1 About This Guide
1.4 Support and Feedback
DBUG405-1.0E
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Table 1-1 Abbreviations and Terminologies
Abbreviations and Terminology
Full Name
FPGA
Field Programmable Gate Array
SIP
System in Package
SDRAM
Synchronous Dynamic RAM
CFU
Configurable Function Unit
CLS
Configurable Logic Section
CRU
Configurable Routing Unit
LUT4
4-input Look-up Table
LUT5
5-input Look-up Table
LUT6
6-input Look-up Table
LUT7
7-input Look-up Table
LUT8
8-input Look-up Table
REG
Register
ALU
Arithmetic Logic Unit
IOB
Input/Output Block
SSRAM
Shadow Static Random Access Memory
BSRAM
Block Static Random Access Memory
GPIO
Gowin Programmable I/O
PLL
Phase-locked Loop
DLL
Delay-locked Loop
EQ144
EQFP144
1.4
Support and Feedback
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