2 Introduction
2.5 Features
DBUG375-1.2E
7(34)
double row of pins with 2.00mm pitch.
9.
MIPI CSI Interface
MIPI interface includes 3 pairs of differential signals, among which
one for clock and four for data.
15pin FPC connector with 1mm pitch is used.
Differential signals of three lanes are simultaneously channeled to
the double row pin of 20 pin and 2.00mm pitch.
10.
SD card slot
Eight contacts, push-push type
Card detection
11.
RTC
Externally connected to 32.768KHz quartz crystal is used.
Dual power supply design can be used to develop board power
supply or button cell.
The communication interface with FPGA is I2C.
12.
AD/DA
Supports 12-bit A/D and D/A converters, and 8-channel interface
can be configured to any combination of ADC/DAC/GPIO.
The input and output interface uses 8pin.
13.
CAN
The communication with FPGA is via UART.
The maximum rate is 1Mbps.
14.
WIFI
The communication with FPGA is via SPI;
SPI rate is 20Mbps.
15.
GPIO Interface
There are 40PIN double rows pins, including 34 GPIOs. I/O Bank
voltage is adjusted to 3.3V and there are 3.3V voltage and 5V
voltage and two ground pins.
There are 20PIN double rows pins, including 16 GPIOs. All I/O and
40PIN multiplex GPIO of FPGA. There are two 3.3V ground pins
and one 5V ground pin.
16.
Debug
Four keys
Four switches
Four blue LEDs
