Giga-tronics 2508A, Operation Manual

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2500A Chapter 3: Remote Operation
84 2500A Series Operation Manual, 34172 Revision C, March 2008
3.5.1 Status Byte (STB) and Service Request Enable (SRE) Registers
The Status Byte Register is the primary status register. It is the top-level register used to track changes in
the state of the 2500A. The summary bits of lower-level status registers become set in the Status Byte
Register when certain conditions occur that are being monitored by and have been enabled in those
lower-level registers. The *STB? query can be used to read the contents of the Status Byte Register.
The Service Request Enable Register controls which bits in the Status Byte Register can generate a ser-
vice request. The bits in the Service Request Enable Register are logically ANDed with the equivalent
bits in the Status Byte Register, and the results of those AND operations are logically ORed to produce a
service request. The RQS/MSS bit (bit 6) in the Status Byte Register is set when the logic OR operation
produces a service request. The *SRE command can be used to set the contents of the Service Request
Enable Register, and the *SRE? query can be used to read the contents of the Service Request Enable
Register.
The following describes each bit in the Status Byte Register:
0 Local Control. This bit is set whenever the Local button is pressed while the source is in remote
operation
1 Not used. Always 0.
2 Error/Event. This bit is set whenever a SCPI error has occurred.
3 QUES Status (Questionable Status). This bit is set whenever a condition defined in the question-
able status register has occurred. See the section entitled “Questionable Status Condition and
Enable Registers”, below, for details.
4 MAV. Message Available. This bit is set whenever a message is available.
5 ESB. Standard Event Status Register. This bit is set whenever a condition defined in the Stan-
dard Event Status Register has occurred. See the section entitled “Standard Event Status (ESR)
and Standard Event Status Enable (ESE) Registers”, below, for details.
6 RQS/MSS. Interrupt Request. This bit is set whenever an event identified by the service request
mask has occurred.
7 Not used. Always 0.
3.5.2 Standard Event Status (ESR) and Standard Event Status Enable
(ESE) Registers
The Standard Event Status Register is one of the lower-level status registers. It monitors certain common
instrument status conditions. When a condition occurs that is being monitored by this register,
and that
7 6 5 4 3 2 1 0
Not used RQS/
MSS
ESB MAV QUES
Status
Error/
Event
Not Used Local
Control