Interface
5-24
C141-E042-01EN
The data stored in the buffer, and CRC code and ECC bytes are written to the data
field of the corresponding sector(s). Upon the completion of the command
execution, the command block registers contain the cylinder, head, and sector
addresses of the last sector written.
If an error occurs during multiple sector write operation, the write operation is
terminated at the sector where the error occured. Command block registers
contain the cylinder, the head, the sector addresses (in the CHS mode) or the
logical block address (in the LBA mode) of the sector where the error occurred.
Then the host can read the command block registers to determine what error has
occurred and on which sector the error has occurred.
At command issuance (I/O registers setting contents)
1F7
H
(CM)
0
0
1
1
0
0
0
R
1F6
H
(DH)
×
L
×
DV
Start head No. /LBA
[MSB]
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(FR)
Start cylinder No. [MSB] / LBA
Start cylinder No. [LSB] / LBA
Start sector No. / LBA [LSB]
Transfer sector count
xx
R = 0
→
with Retry
R = 1
→
without Retry
At command completion (I/O registers contents to be read)
1F7
H
(ST)
Status information
1F6
H
(DH)
×
L
×
DV
End head No. /LBA
[MSB]
1F5
H
(CH)
1F4
H
(CL)
1F3
H
(SN)
1F2
H
(SC)
1F1
H
(ER)
End cylinder No. [MSB] / LBA
End cylinder No. [LSB] / LBA
End sector No. / LBA [LSB]
00 (*1)
Error information
*1
If the command is terminated due to an error, the remaining number of
sectors of which data was not transferred is set in this register.
Summary of Contents for MHA2021AT
Page 1: ...C141 E042 01EN MHA2021AT MHA2032AT DISK DRIVES PRODUCT MANUAL ...
Page 40: ...Installation Conditions 3 12 C141 E042 01EN Figure 3 14 Example 2 of Cable Select ...
Page 45: ...4 3 Circuit Configuration C141 E042 01EN 4 5 Figure 4 2 Circuit Configuration ...
Page 51: ...4 6 Read write Circuit C141 E042 01EN 4 11 Figure 4 4 Read write circuit block diagram ...
Page 136: ...5 4 Command Protocol C141 E042 01EN 5 75 Figure 5 7 Normal DMA data transfer ...
Page 138: ...5 5 Timing C141 E042 01EN 5 77 Figure 5 8 Data transfer timing ...
Page 144: ...6 1 Device Response to the Reset C141 E042 01EN 6 3 Figure 6 1 Response to power on ...
Page 177: ......