Fuji Electric Co., Ltd.
4-2
MT6M12343 Rev.1.0
Dec.-2016
Chapter 4
Power Terminals
1. Connection of bus input terminal and low side emitters
In this chapter, the guideline and precautions in circuit design on the power terminals, such as how to
determine the resistance of shunt resistor are explained.
Terminal Name
Description
P
Positive bus voltage input
It is internally connected to the collector of the high-side IGBTs.
In order to suppress the surge voltage caused by the wiring or PCB pattern
inductance of the bus voltage, connect a snubber capacitor close to this pin.
(Typically metal film capacitors are used)
U,V,W
Motor output terminal
Inverter output terminals for connecting to motor load.
N(U),N(V),N(W) Negative bus voltage input terminals
These terminals are connected to the low-side IGBT emitter of the each phase.
In order to monitor the current on each phase, shunt resistors are inserted between
these terminals and the negative bus voltage input (power ground).
(1) Description of the power terminals
Table 4-1 shows the detail about the power terminals.
Table 4-1 Detail description of power terminals
(2) Recommended wiring of shunt resistor and snubber capacitor
External current sensing resistors are applied to detect OC (over current) condition or phase currents.
A long wiring patterns between the shunt resistor and the IPM will cause excessive surge that might
damage internal IC, and current detection components. To reduce the pattern inductance, the wiring
between the shunt resistors and the IPM should be as short as possible.
As shown in the Fig.4-1, snubber capacitors should be connected at the right location to suppress
surge voltage effectively. Generally a 0.1 ~ 0.22
F snubber is recommended. If the snubber capacitor
is connected at the wrong location "A" as shown in the Fig.4-1, the snubber capacitor cannot suppress
the surge voltage effectively because inductance of wiring is not negligible.
Fig.4-1 Recommended wiring of shunt resistor
and snubber capacitor
A
B
C
If the capacitor is connected at the location
"B", the charging and discharging currents
generated by wiring and the snubber capacitor
will appear at the shunt resistor. This will
impact the current sensing signal and the OC
protection level will be lower than the
calculated design value. Although the
suppression effect when the snubber capacitor
is connected at location "B" is greater than
location "A" or "C", location "C" is a reasonable
position considering the impact to the current
sensing accuracy. Therefore, location "C" is
recommended.
P
N(U)
N(V)
N(W)
+
DC Bus
Positive
DC Bus
Negative
inductance of wire(or pattern of PCB)
Bulk Capacitor
Shunt resistor
COM
