Mainboard User’s Manual
Advanced Chipset Features
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4.4. Advanced Chipset Features
Selecting “Advanced Chipset Features” on the main program
screen displays this menu:
This option displays a table of items that define critical timing
parameters of the mainboard. You should leave the items on this
page at their default values unless you are very familiar with the
technical specification of your system hardware. If you change the
values incorrectly, you may introduce fatal errors or recurring
instability into your system.
DRAM Timing Selectable : Enables you to set the DRAM timing
manually, or automatically using SPD (Serial Presence Detect). SPD
is an EEPROM chip on the memory module that stores information
about the memory chips it contains, including size, speed, voltage,
row and column addresses, and manufacturer. We recommend setting
this field to By SPD.
CAS Latency Time : This item enables you to optimize the speed at
which data is accessed in a column by defining CAS latency time.
The CAS latency defines the time delay (in CLKs) before SDRAM
starts a read command after receiving it. Because reading data in a
row is twice as fast, reducing this number can increase performance
at the expense of stability. We recommend that you leave this item at
the default value. The default setting is “2”.
