Mainboard User’s Manual
40
Chipset
Features Setup
4.5. Chipset Features Setup
Selecting “Chipset Features Setup” on the main program screen dis-
plays this menu:
ROM PCI/ISA BIOS (2A5LEF2A)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Detect DIMM/PCI Clk
: Enabled
Spread Spectrum
: Disabled
Current CPU Temp.
:
Current System Temp.
:
Current CPU FAN Speed
:
Current FAN2 Speed
:
Vccp :
2.5V :
Vcc3 :
5V :
12V :
Bank 0/1 DRAM Timing
: FP/EDO 60ns
Bank 2/3 DRAM Timing
: FP/EDO 70ns
Bank 4/5 DRAM Timing
: FP/EDO 70ns
SDRAM Cycle Length
: 3
DRAM Read Pipeline
: Enabled
Sustained 3T Write
: Enabled
Cache Rd+CPU Wt Pipeline : Enabled
Cache Timing
: Enabled
Video BIOS Cacheable
: Enabled
System BIOS Cacheable
: Enabled
Memory Hole At 15Mb Addr. : Disabled
AGP Aperture Size
: 64M
OnChip USB
: Enabled
USB Keyboard Support
: Disabled
OnChip Sound
: Enable
OnChip Modem
: Disable
Esc : Quit
↑
↑
↓
↓
→
→
←
←
: Select Item
F1 : Help
PU/PD/+/- : Modify
F5 : Old Values
(Shift) F2
: Color
F7 : Load Setup Defaults
Figure 4-4:
Chipset features setup
This screen controls the settings for the board’s chipset. All entries
related to the DRAM timing on the screen are automatically config-
ured. Do not make any changes unless you are familiar with the
chipset.
Bank 0/1 2/3 4/5 DRAM Timing:
This item allows you to select the
value in the field, depending on whether the board has paged
DRAMs or EDO (extended data output) D RAMs. The following op-
tions are allowed:
•
FP/EDO 70ns
•
FP/EDO 70ns
•
Normal
•
Medium
•
Fast
•
Turbo
SDRAM Cycle Length:
This field enables you to set the CAS la -
tency time in HCLKs of 2/2 or 3/3. The system board designer
should have set the values in this field, depending on the DRAM in-
stalled. Do not change the values in this field unless you change
specifications of the installed DRAM or the installed CPU.
Summary of Contents for P5F113
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