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P5F97/P5F103 User’s Manual
3.9 CHIPSET FEATURES SETUP
Selecting “CHIPSET FEATURES SETUP” on the main program
screen displays this menu:
Chipset Features Setup Screen
This screen controls the settings for the board’s chipset. All entries
related to the DRAM timing on the screen are automatically config-
ured. Do not make any change unless you are familiar with the
chipset.
Auto Configuration:
This feature will set pre-determined optimal
timing for DRAM, cache according to CPU type and system clock.
The option are “Enabled” or “Disabled”, default is “Enabled”.
DRAM Timing:
The DRAM timing depends on performance param-
eters of installed memory chips (DRAM). The options are “Normal”,
“Fast” and “Slow”. Do not change the value from the factory setting
unless you installed new memory that has a different performance rat-
ing than the original DRAMs.
Chapter 3: BIOS Configuration
ROM PCI/ISA BIOS (2A5KKF2B)
CHIPSET FEATURES SETUP
AWARD SOFTWARE, INC.
Auto Configuration
DRAM Timing
DRAM Data Integrity Mode
SDRAM Burst X-1-1-1-1-1-1-1
: Enabled
: Normal
: Disabled
: Disabled
: ALL
Primary Frame Buffer
(Shift) F2: Color
PU/PD/+/-:Modify
ESC: Quit
F1: Help
F5: Old Values
F7: Load Setup Defaults
:Select Item
VGA Frame Buffer
: Enabled
Memory Hole At 15M-16M
: CLK2/3
ISA Line Buffer
: Enabled
Graphics Apeture Size
Passive Release
: 64MB
: Enabled
AUTO Detect DIMM/PCI clk : Enabled
Host Read DRAM Command Mode
Pipeline Function
IO Recovery Period
Data Merge
Delay Transaction
AT Bus Clock
: Bypass
: Enabled
: Disabled
: 1 us
: Disabled
: Disabled
- 5V
+ 12V
Vcc3
: -4.98
: +12.01
: +3.32
: -11.96
: +5.01
: +2.80
- 12V
+5V
Vccp
Current FAN Speed
CPU Warning Temperature
: 4353
: 48
0
C/
120
0
F
: 66
0
C/
151
0
F
:
Disabled
Spread Spectrum
Current System Temp.
