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Slide 66
Lab 4 – Modulo Timer Module
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Modulo Timer features include:
8-bit up-counter
Free-running or 8-bit modulo limit
Software controllable interrupt on overflow
Counter reset bit (TRST)
Counter stop bit (TSTP)
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Four software selectable clock sources for input to prescaler:
System bus clock — rising edge
Fixed frequency clock (XCLK) — rising edge
External clock source on the TCLK pin — rising edge
External clock source on the TCLK pin — falling edge
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Nine selectable clock prescale values:
Clock source divide by 1, 2, 4, 8, 16, 32, 64, 128, or 256