Freescale Semiconductor KIT912F634EVME User Manual Download Page 10

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Hardware Description

KT912F634UG User’s Guide Rev. 2.0 10/2013

Freescale Semiconductor, Inc.

Archive Information

Table 3. Jumper Setting

Jumper

Function

Connections

JP1

Supplying of the device logic (VDDX regulator) and hall sensor supply regulator enabled

closed

Supplying of the device logic (VDDX regulator) and hall sensor supply regulator disabled

open

JP2

Supplying of the HS drivers enabled

closed

Supplying of the HS drivers disabled

open

JP3

Wake-up pin L0 connected to HS1 output

1-2

Wake-up pin L0 connected to wake-up button SW2

2-3

JP4

VDDX output voltage (+5.0 V) connected to LED D6

closed

VDDX output voltage (+5.0 V) not connected to LED D6

open

JP5

BKGD/MODC pin connected to +5.0 V via a 3.0 k pull-up resistor

1-2

BKGD/MODC pin connected to GND

2-3

JP6

Supply voltage is connected to Zener diode D11

closed

Supply voltage is not connected to zener diode D11 (when the current consumption of the
device in low power modes is demonstrated).

open

JP7

TCLK pin (#44) is connected to 8.0 V (also jumper JP6 has to be inserted and the board has
to be powered at least with 8.0 V) to disable of the watchdog.

1-2

TCLK pin (#44) is connected to GND

2-3

JP8

Supply voltage (+5.0 to 18 V) is connected to LED D8

closed

Supply voltage (+5.0 to 18 V) is not connected to LED D8

open

JP9

VDD output voltage (+2.5 V) is connected to LED D8

closed

VDD output voltage (+2.5 V) is not connected to LED D8

open

JP10

Diode D2 is connected to output HS2

closed

Diode D2 is not connected to output HS2

open

JP11

Diode D1 is connected to output HS1

closed

Diode D1 is not connected to output HS1

open

JP12

Diode D3 is connected to output LS1

closed

Diode D3 is not connected to output LS1

open

JP13

Diode D4 is connected to output LS2

closed

Diode D4 is not connected to output LS2

open

JP14

BDM signal from TBDML interface enabled

closed

BDM signal from TBDML interface disabled, external BDM interface can be used (connected
to J4)

open

JP15

RST signal from TBDML interface enabled

closed

RST signal from TBDML interface disabled, external BDM interface can be used (connected
to J4)

open

Summary of Contents for KIT912F634EVME

Page 1: ...oard Featuring the MM912F634 Integrated S12 Based Relay Driver with LIN Device Figure 1 KIT912F634EVME Evaluation Board 1 Kit Contents Packing List 2 2 Jump Start 3 3 Important Notice 4 4 KIT912F634EV...

Page 2: ...t KT912F634UG User s Guide Rev 2 0 10 2013 2 Freescale Semiconductor Inc Archive Information Archive Information 1 Kit Contents Packing List MM912F634 Evaluation Board EVB Cable 6FT USB2 0 A M to B M...

Page 3: ...13 Freescale Semiconductor Inc 3 Archive Information Archive Information 2 Jump Start Go to www freescale com analogtools Locate your kit Review your Tool Summary Page Look for Download documents soft...

Page 4: ...kit it may be returned within 30 days from the date of delivery and will be replaced by a new kit Freescale reserves the right to make changes without further notice to any products herein Freescale m...

Page 5: ...interface based on FreeMASTER software is provided together with the module Thanks to the GUI the user can easily evaluate the peripheral modules or directly access the registers on the analog die 4 1...

Page 6: ...er settings 3 Connect a laboratory power supply via banana connectors to the board using J2 V_S supply and J3 GND Alternatively the LIN connector can be used for powering the board The supply voltage...

Page 7: ...closed Supplying of the device logic VDDX regulator and Hall sensor supply regulator disabled open JP2 Supplying of the HS drivers enabled closed Supplying of the HS drivers disabled open JP14 BDM sig...

Page 8: ...ins the passive components required for proper operation of the MM912F634 Connectors provide access to all device pins and test points for important signals There are fifteen jumpers on the board Powe...

Page 9: ...log to digital converter ADC battery voltage sense VSENSE and local interconnect network LIN The MM912F634 has three main operating modes Normal all functions available Sleep VDD off Wake up via LIN W...

Page 10: ...ow power modes is demonstrated open JP7 TCLK pin 44 is connected to 8 0 V also jumper JP6 has to be inserted and the board has to be powered at least with 8 0 V to disable of the watchdog 1 2 TCLK pin...

Page 11: ...the following paragraphs In the following tables the Supply voltage is meant to supply a voltage protected against a reverse polarity by diode D10 Figure 5 Connectors 7 3 1 Connectors Table 4 Connect...

Page 12: ...g part is MOLEX 39 01 4030 7 3 3 Power Connectors J2 J3 Power connectors J2 positive supply red and J3 ground black are sockets for widely used 4 0 mm banana jacks 7 3 4 BDM Connector J4 A standard BD...

Page 13: ...J6 The connector type is header 2x5 pins 2 54 mm pitch Pin assignment is listed in Table 8 Table 7 Signal Connector J5 Pin No Description 1 HS1 output 2 HS2 output 3 GND 4 LS1 output 5 LS2 output 6 S...

Page 14: ...supply ground are connected as well Physically the connector J7 has 2 rows of pins with 0 1 pitch 7 3 8 Signal Connector J8 The J8 connector is header type 2x2 0 1 2 54 mm pitch Table 9 Signal Connect...

Page 15: ...on the EVM The schematic is marked with reference numbers as well as signal names The board is only marked with signal names The following Table 12 summarizes the test points Table 11 USB Connector J...

Page 16: ...age 18 8 1 1 FreeMASTER Software Installation Before running the application it is necessary to install the FreeMASTER software included in the jump start download See section Jump Start on page 3 Sys...

Page 17: ...heet During device programming the watchdog must be disabled otherwise the programming will not run successfully To disable the watchdog a voltage between 7 5 and 10 V has to be applied on pin 44 TCLK...

Page 18: ...or descriptions for the target board application features scopes and recorders application control etc Create a logical tree structure of blocks relating to the various board application functions an...

Page 19: ...n from reset to normal mode sometimes the device does not wake up properly For this reason communication is interrupted by the JavaScript function before the device is put to STOP or SLEEP mode This f...

Page 20: ...applied there is no special error message displayed The board will simply not respond to the commands sent from the GUI If the following alert is displayed Figure 8 Communication Error Alert The most...

Page 21: ...menu Project Options and then in the dialog window select Comm tab Check if the right communication way is selected Figure 10 Options GUI with Comm Tab Displayed FreeMASTER OSBDM Communication Plug in...

Page 22: ...ure 12 Incorrect Path Error Alert The window shown below will appear Figure 13 Missing Symbol Definitions Window Click the Continue button and check the correct path to the source files Click on the m...

Page 23: ...Information Figure 14 Options GUI with MAP Files Tab Displayed If the start control page does not look the same as depicted in the Figure 7 but the following information appears on the screen then th...

Page 24: ...t the HTML Pages tab Select the correct path to the start html file It should be located in the src directory together with abs file and the other HTML pages modules html and registers html Figure 16...

Page 25: ...R BDM Communication Plug in must be selected Click the Configure button to check if the additional setting is correct according to following dialog window Figure 18 BDM Communication GUI Click on Resc...

Page 26: ...is one big button for reading and writing high and low byte as single 16 bit value There are also registers that cannot be modified In such cases the button Write is disabled There are almost 100 reg...

Page 27: ...e described in more detail Table 13 FreeMASTER Direct Register Access Control Page Description Item Name and Description 1 Six tabs with registers 2 Register address 3 Register name 4 Bit field by cli...

Page 28: ...tatus registers Wake up source register Reset status register and Voltage status register Their description is in the MM912F634 data sheet Figure 23 Status Block The watchdog is enabled after the rese...

Page 29: ...y checking the tick box next to Enable PWM Channel 0 or Enable PWM Channel 0 respectively The frequency and the duty cycle are set by a pair of sliders The PWM module allows setting a positive or nega...

Page 30: ...the current sense resistor placed on the board the value of the current is listed in raw ADC units instead of amps The amplification of the voltage over the current sense resistor is set to 7 times t...

Page 31: ...The reason is that during wake up the device is transitioning from the reset to normal mode The BDM interface can interrupt this transition so the device cannot wake up properly After the device comp...

Page 32: ...put in corresponding variables 8 4 2 1 Performing the FreeMASTER Variables Update In the continuous loop first the value of fm_status is checked It can have two enumerated values pending or done If t...

Page 33: ...address 0x216 and fm_data 0x1 because first the analog die has to be put in low power mode by writing 0x1 to the Mode Control Register The STOP instruction is then executed 8 4 3 LIN Communication 8 4...

Page 34: ...een D7 Green 2 1 TP19 AD1 TP19 AD1 TP8 L0 TP8 L0 JP11 HDR 1X2 JP11 HDR 1X2 1 2 C4 0 1UF C4 0 1UF C2 0 1UF C2 0 1UF TP15 5V TP15 5V JP15 HDR 1X2 JP15 HDR 1X2 1 2 TP23 GND TP23 GND D4 Yellow D4 Yellow 2...

Page 35: ...CE R1OUT T1IN For programming of the HC908 device Connect to the external MAX3232 908JB8 HC125 10V for IRQ high voltage during programming GND 5V for supply of standalone MAX3232 Off page connectors U...

Page 36: ...Board Layout KT912F634UG User s Guide Rev 2 0 10 2013 36 Freescale Semiconductor Inc Archive Information Archive Information 10 Board Layout 10 1 Assembly Layer Top...

Page 37: ...2013 Freescale Semiconductor Inc 37 Archive Information Archive Information 10 2 Assembly Layer Bottom Note This image is an exception to the standard top view mode of representation used in this doc...

Page 38: ...Board Layout KT912F634UG User s Guide Rev 2 0 10 2013 38 Freescale Semiconductor Inc Archive Information Archive Information 10 3 Top Layer Routing...

Page 39: ...Board Layout KT912F634UG User s Guide Rev 2 0 10 2013 Freescale Semiconductor Inc 39 Archive Information Archive Information 10 4 Bottom Layer Routing...

Page 40: ...100 F 6 3 V Panasonic EEEFKJ101UAR 1 C103 100 F 20 V Electrolytic capacitor SMD 100 F 20 V Nichicon PCF1D101MCL1GS 7 D1 D2 D5 D6 D7 D8 D102 LED green SMD 0805 KINGBRIGHT KP 2012MGC 2 D3 D4 LED yellow...

Page 41: ...0805 Multicomp MC 0 1W 0805 5 100R 1 R14 820 Resistor 820 5 0805 Multicomp MC 0 1W 0805 5 820R 1 R101 10 M Resistor 10 M 5 0805 PHYCOMP YAGEO 232273061106 2 R102 R103 1 8 K Resistor 1 8 k 5 0805 Mult...

Page 42: ...2 ISENSE_H ISENSE_L HSUP L0 L1 L2 L3 L4 L5 V_D_supp 5V LIN AD0 AD1 AD2 2 5V 5V GND AN_GND GND GND GND Test points Keystone 5002 Note Freescale does not assume liability endorse or warrant components f...

Page 43: ...gion Document Number and Description URL AN2395 Application Note http cache freescale com files microcontrollers doc app_note AN2395 pdf fsrch 1 sr 1 Freescale com Support Pages URL KIT912F634EVME Too...

Page 44: ...v 2 0 10 2013 44 Freescale Semiconductor Inc Archive Information Archive Information 13 Revision History Revision Date Description of Changes 1 0 11 2010 Initial Release 2 0 10 2013 Added new chapter...

Page 45: ...damages Typical parameters that may be provided in Freescale data sheets and or specifications can and do vary in different applications and actual performance may vary over time All operating paramet...

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