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PA3Cm11
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8.4.23
PCI Express GEN 2 Settings
Feature
Options
Description
Completion Timeout
Default
Shorter
Longer
Disabled
Select the completion timeout value:
'Default' – 50us to 50ms.
‘Shorter’ – Software will use shorter timeout ranges.
‘Longer’ – Software will use longer timeout ranges.
ARI Forwarding
Disabled
Enabled
If set to ‘Enabled’, the downstream port disables it's traditional device number field when
turning a type 1 configuration request into a type 0 configuration request, permitting
access to extended functions in an ARI device immediately below the port.
AtomicOp Requester Enable
Disabled
Enabled
If set to ‘Enabled’, this feature initiates AtomicOp requests only if bus master enable bit is
in the command register set.
AtomicOp Egress Blocking
Disabled
Enabled
If set to ‘Enabled’, outbound AtomicOp requests via egress ports will be blocked.
IDO Request Enable
Disabled
Enabled
If set to ‘Enabled’, this feature permits setting the number of ID-Based Ordering (IDO) bit
(Attribute[2]) requests to be initiated.
IDO Completion Enable
Disabled
Enabled
If set to ‘Enabled’, this feature permits setting the number of ID-Based Ordering (IDO) bit
(Attribute[2]) requests to be initiated.
LTR Mechanism Enable
Disabled
Enabled
Enable or disable the Latency Tolerance Reporting (LTR) mechanism.
End-End TLP Prefix Blocking
Disabled
Enabled
If set to ‘Enabled’, this function will block forwarding of TLPs containing End-End TLP
prefixes.
Target Link Speed
Auto
Force to 2.5 GT/s
Force to 5.0 GT/s
Select the target link speed:
‘Auto’ – Uses HW initialized data.
‘Force to X.X GT/s’ – Sets an upper limit on link operational speed by restricting the
values advertised by the upstream component in its training sequences.
Clock Power Management
Disabled
Enabled
If set to ‘Enabled’, the device is permitted to use CLKREQ# signal for power management
of link clock in accordance to protocol as defined in appropriate form factor specification.
Compliance SOS
Disabled
Enabled
If set to ‘Enabled’, this feature forces LTSSM to send SKP ordered sets between
sequences when sending a compliance pattern or a modified compliance pattern.
Hardware Autonomous Width
Enabled
Disabled
If set to ‘Disabled’, this feature disables the hardware´s ability to change link width, except
for the purpose of correcting unstable link operation.
Hardware Autonomous Speed
Enabled
Disabled
If set to ‘Disabled’, this feature disables the hardware´s ability to change link speed,
except speed rate reduction for the purpose of correcting unstable link operation.
Note
You cannot use any of the features above if your hardware does not support it.