Fortec Star CM1-BT1, Manual

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Using the Module 77
CMx-BTx
4.10 Interrupts
4.10.1 SERIRQ Interrupt Mapping
Below the SERIRQ Interrupt Mapping is shown:
Table 4-13: SERRIRQ Interrupt Mapping
Data
Frame# Interrupt Clocks Past
Start Frame Comment
1 IRQ0 2 Ignored. Can only be generated via the internal 8524
2 IRQ1 5 Before port 60h latch
3 SMI# 8
Causes SMI# if low. Sets SMI_STS.ILB_SMI_STS
register bit
4 IRQ3 11 Default: COM0
5 IRQ4 14 Default: COM1
6 IRQ5 17
7 IRQ6 20 Default: COM2
8 IRQ7 23
9 IRQ8 26 Ignored. IRQ8# can only be generated internally
10 IRQ9 29
11 IRQ10 32
12 IRQ11 35
13 IRQ12 38 Before port 60h latch / Default: COM3
14 IRQ13 41 Ignored
15 IRQ14 44 Ignored
16 IRQ15 47
17 IOCHCK# 50 Same as ISA IOCHCK# going active
18 PCI INTA# 53
19 PCI INTB# 56
20 PCI INTC# 59
21 PCI INTD# 62
The IRQ16 up to IRQ23 (APIC) are not supported by serial IRQs.