Festo CMXR-C1, Description

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4. PLC interface MCP1
Festo GDCP-CMXR-F-EN 0909a 21
4.4 Function of the PLC interface MCP1
4.4.1 Watchdog
The watchdog control bit CREG.WDBIT is sent from the PLC to the robot controller. This, in
turn, remirrors the bit at the SREG.WDBIT output with max. delay in the watchdogTimout
parameter.
Condition The running up of the control system and the interface was successful.
Activity Alternative setting and resetting of CREG.WDBIT
Reaction The current value of CREG.WDBIT is issued in the SREG.WDBIT
Configuration The configuration is carried out via FCT
4.4.2 Error active
The SREG.ERROR bit is used to inform the control system that at least one error is active.
The cause of the error can be evaluated using the SREG3 register. A faultless robot
controller is a requirement for operation via the PLC interface.
4.4.3 Message system
Status register 1, bit 6, is used to show whether an error is active.
Status register 3 can be used to read out the message class and message number in the
event of an error.
4.4.4 Message classes and numbers in MCP1
The message class provides the approximate classification of a message. It is transmitted
in the SREG3.MSG register with 3 bits. The message number provides additional
information on the message class. It is displayed in the status register SREG3.MSGNR with
a further 4 bits.
Note
The applied message only becomes valid as soon as SREG3.MSG is
not equal to 0 or if the error bit SREG.ERROR is set.