FabiaTech FX5634 Fanless Series, User Manual

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FabiaTech Corporation
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PCI Latency Timer
This field specifies the latency timings (in PCI clock) PCI devices installed in the PCI
expansion bus.
Available Options: 32, 64, 96, 128, 160,192, 224, and 248
Default setting: 64
Allocate IRQ to PCI VGA
When a PCI or AGP VGA device is installed, you can assign an IRQ to this device.
Selecting Yes, BIOS will auto-assign IRQ to the device. Selecting No, no IRQ will be
assigned to the VGA device.
Available Options: Yes, No
Default setting: No
Palette Snooping
When Enabled is selected, multiple VGA devices operating on different buses can
handle data from the CPU on each set of palette registers on every video device.
Bit 5 of the command register in the PCI device configuration space is the VGA
Palette Snoop bit. (0 is disabled).
Available Options:
Disabled: Data read and written by the CPU is only directed to the PCI VGA
devices palette registers.
Enabled: Data read and written by the CPU is directed to both the PCI VGA
devices palette registers.
Default setting: Disabled
PCI IDE BusMaster
This option is to specify that the IDE controller on the PCI local bus have bus-
mastering capability.
Available Options: Enabled, Disabled
Default setting: Disabled
OFFBoard PCI/ISA IDE Card
This option is to specify some IDE cards require this to be set to PCI slot number that
is holding the card.
Available Options: Auto, PCI SLOT 1~6
Default setting: Auto