CONFIDENTIAL
3
PCB Layout Design
• The recommended width of the shield electrode width is 2 cm.
• Employ a grid on the top layer with a trace width of 7 mil and a grid width of 45 mil (25% fill). The filled grid
is connected to the driver shield signal.
• Employ a grid on the bottom layer with a trace width of 7 mil and a grid width of 70 mil (17% fill). The filled
grid is connected to the driver shield signal.
• The protective sensor should be in a rectangle shape with curved edges and surround all other sensors.
• The recommended width of the protective sensor is 2 mm.
• The recommended gap between the protective sensor and shield sensor is 1 mm.
• The sensing distance of the proximity sensor is directly proportional to the area of the proximity sensor.
However, increasing the sensing area will introduce more noise. Actual testing is needed for optimized
performance.
• It is recommended that the shape of the proximity sensor is a closed loop. The recommended width is 1.5
mm.
Note:
For more details on the hardware design of ESP32-S3 touch sensor, please refer to
ESP32-S3 Touch Sensor Application Note
3.10
Typical Layout Problems and Solutions
3.10.1 Q: The current ripple is not large, but the TX performance of RF is rather poor.
Analysis:
The current ripple has a strong impact on the RF TX performance. It should be noted that the ripple must be
tested when ESP32-S3 is in the normal working mode. The ripple increases when the power gets high in a
different mode.
Generally, the peak-to-peak value of the ripple should be <80 mV when ESP32-S3 sends MCS7@11n packets,
and <120 mV when ESP32-S3 sends 11m@11b packets.
Solution:
Add a 10
µ
F filter capacitor to the branch of the power trace (the branch powering the chip’s analog power pin).
The 10
µ
F capacitor should be as close to the analog power pin as possible for small and stable current
ripples.
3.10.2 Q: The power ripple is small, but RF TX performance is poor.
Analysis:
The RF TX performance can be affected not only by power ripples, but also by the crystal oscillator itself. Poor
quality and big frequency offsets of the crystal oscillator decrease the RF TX performance. The crystal oscillator
clock may be corrupted by other interfering signals, such as high-speed output or input signals. In addition,
high-frequency signal traces, such as the SDIO traces and UART traces under the crystal oscillator, could also
Espressif Systems
27
ESP32-S3 Series Hardware Design Guidelines v1.0
