CHAPTER 1: INTRODUCTION
I-5
1.5
Table 1.5.1 Pin description
Terminal Name
V
DD
V
SS
V
S1
V
L1
V
L2
V
L3
CA, CB
OSC1
OSC2
K00–K03
P00–P03
R00, R01
SEG0–19
COM0–3
RESET
TEST
Pin No.
47
46
2
43
42
41
44, 45
48
1
8–11
4–7
14, 13
36–27
24–15
37–40
26
25
Input/Output
(I)
(I)
O
O
O
O
–
I
O
I
I/O
O
O
O
I
I
Function
Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated
voltage output terminal
LCD system reducer output terminal (V
L2
×
1/2)
/ LCD system reducer output terminal (V
L3
×
1/3)
LCD system booster output terminal (V
L1
×
2)
/ LCD system reducer output terminal (V
L3
×
2/3)
LCD system booster output terminal (V
L1
×
3)
/ LCD system booster output terminal (V
L2
×
3/2)
Booster capacitor connecting terminal
Crystal or CR oscillation input terminal
Crystal or CR oscillation output terminal
Input terminal
I/O terminal
Output terminal
LCD segment output terminal
(convertible to DC output terminal by mask option)
LCD common output terminal
Initial setting input terminal
Test input terminal
Pin Description