DFX-8500
Rev. B
2-20
Figure 2-16 shows the data flow for data input via the parallel interface. Although various circuits perform
data processing, the control core is the CPU and all operations are executed via the CPU. In this circuit, the
E05B36 IC (IC1) provides the interface between the external host computer and the CPU, and all data
processing is performed by read/write operations to MMIO (Memory Mapped Input / Output).
Data from the host computer is latched by repeating steps 1 through 3 below.
1. Upon receiving the /STROBE pulse, IC1 latches the data into ports PDATA 1 - 8 and sets the BUSY
signal to HIGH.
2. The CPU reads the latched data from the MMIO port, checks whether the data is a print command (CR
code), and stores it in the input data buffer if it is not.
3. After checking the data, the CPU makes IC1 clear the BUSY signal and output the /ACKNLG signal, via
the MMIO accesses. When either a CR code is received or the input data buffer becomes full, the CPU
sets the BUSY signal to HIGH and executes printing.
4. The CPU reads the data from the input data buffer, analyzes each byte to determine whether it is a
character or a command, and converts it to print data. The print data consists of 1-byte character codes
and 2-byte attributes. Character data is stored as character codes and commands or character types are
stored as attributes.
5. The print data is stored in the line buffer in units of one line of data.
6. The CPU reads the print data stored in the line buffer byte by byte, accesses the CG (Character
Generator), and expands the data in the image buffer (in the case of download characters, in the
download CG). A row of expanded data is output to the printhead control circuit as printhead data.
Note : The data flow from the Type-B I/F card is the same as the data flow from the parallel
interface, described above, except the signal names and data access method differ.
MMIO
CR command ?
/STROBE
DATA
BUSY, /ACK
3
1
2
E05B36 (IC1)
CPU (IC2)
DATA
No
Yes
DATA
Buffer full ?
Yes
RAM (IC3)
Input Data Buffer
CPU (IC2)
4
5
Line Buffer
Command
Analyzer
Attribute
Character Gnerator
Down Load
Image Buffer
6
8
7
E05B36
Controls
printer mechanism.
STBINT
Figure 2-16. Parallel Interface Data Flow
Summary of Contents for DFX-8500 - Impact Printer
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Page 205: ...MAINTENANCE Rev B 6 3 Figure 6 2 Lubrication and Adhesive Diagram 1 ...
Page 206: ...DFX 8500 Rev B 6 4 Figure 6 3 Lubrication and Adhesive Diagram 2 ...
Page 207: ...MAINTENANCE Rev B 6 5 Figure 6 4 Lubrication and Adhesive Diagram 3 ...
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Page 225: ...APPENDIX Rev B A 21 A 3 Component Layout Figure A 7 C204 MAIN Board Component Layout 1 ...
Page 226: ...DFX 8500 Rev B A 22 Figure A 8 C204 MAIN Board Component Layout 2 ...
Page 229: ...APPENDIX Rev B A 25 Figure A 13 C204 PSB Board Component Layout ...
Page 230: ...DFX 8500 Rev B A 26 Figure A 14 C204 PSE Board Component Layout ...
Page 236: ...DFX 8500 Rev B A 32 Figure A 16 Exploded Diagrams 1 ...
Page 237: ...APPENDIX Rev B A 33 Figure A 17 Exploded Diagrams 2 ...
Page 238: ...DFX 8500 Rev B A 34 Figure A 18 Exploded Diagrams 3 ...
Page 239: ...APPENDIX Rev B A 35 Figure A 19 Exploded Diagrams 4 ...
Page 240: ...DFX 8500 Rev B A 36 Figure A 20 Exploded Diagrams 5 ...
Page 241: ...APPENDIX Rev B A 37 Figure A 21 Exploded Diagrams 6 ...
Page 242: ...DFX 8500 Rev B A 38 Figure A 22 Exploded Diagrams 7 ...
Page 243: ...APPENDIX Rev B A 39 Figure A 23 Packing Material ...
Page 245: ...EPSON SEIKO EPSON CORPORATION ...