Installation
Page 3-6
Section 3-3
System Memory Configuration
Memory Layout
The board supports (3) PC133/VC133 168-pin DIMMs (Dual In-line Memory
Module). The DIMMs is for SDRAM (Synchronous DRAM) .
DIMM SDRAM may be 83MHz (12ns), 100MHz (10ns),
125MHz (8ns) or 133MHz (7.5ns)bus speed.
When using Synchronous DRAM we recommend using the
4 clock variety over the 2 clock.
Figure 6 and Table 1 show several possible memory configuration.
* SDRAM supports 32, 64, 128, 256, 512MB DIMM modules.
* We recommend to use PC100/VC100 Memory Module for bus speed
between 66MHz and 100MHz and PC133/VC133 Memory for bus
speed over 100MHz.
* Using non-compliant memory with higher bus speed (over clocking)
may severely compromise the integrity of the system.
DIMM 1
DIMM 2
DIMM 3
Bank 0/1
Bank 2/3
Bank 4/5
-Synchronous
-Synchronous
DRAM
y
r
o
m
e
M
l
a
t
o
T
1
M
M
I
D
)
1
/
0
k
n
a
B
(
2
M
M
I
D
)
3
/
2
k
n
a
B
(
3
M
M
I
D
)
5
/
4
k
n
a
B
(
B
M
2
1
5
=
m
u
m
i
x
a
M
*
M
A
R
D
S
,
B
M
8
2
1
,
B
M
4
6
,
B
M
2
3
1
X
B
M
2
1
5
,
B
M
6
5
2
e
n
o
N
e
n
o
N
B
G
1
=
m
u
m
i
x
a
M
*
M
A
R
D
S
,
B
M
8
2
1
,
B
M
4
6
,
B
M
2
3
1
X
B
M
2
1
5
,
B
M
6
5
2
*
M
A
R
D
S
,
B
M
8
2
1
,
B
M
4
6
,
B
M
2
3
1
X
B
M
2
1
5
,
B
M
6
5
2
e
n
o
N
B
G
5
.
1
=
m
u
m
i
x
a
M
*
M
A
R
D
S
,
B
M
8
2
1
,
B
M
4
6
,
B
M
2
3
1
X
B
M
2
1
5
,
B
M
6
5
2
*
M
A
R
D
S
,
B
M
8
2
1
,
B
M
4
6
,
B
M
2
3
1
X
B
M
2
1
5
,
B
M
6
5
2
*
M
A
R
D
S
,
B
M
8
2
1
,
B
M
4
6
,
B
M
2
3
1
X
B
M
2
1
5
,
B
M
6
5
2
Figure 6
Table 1
Summary of Contents for mu-3vsa
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