Introduction
EP-3WEF2/3WDF2
Page 1-2
Overview
Intel Celeron processors (P.P.G.A.) 370
The Intel Celeron processors provide power to handle the internet, educational
programs, interactive 3D games, and productivity applications. The Intel Celeron
processors at 533, 500, 466, 433, 400, 366, 333 and 300A MHz include integrated L2
cache 128Kbyte. The core for the 533, 500, 466, 433, 400, 366, 333 and 300A MHz
processors have 19M transistors due to the addition of the integrated L2 cache
128Kbyte. All the Intel Celeron processors are available in the plastic pin grid array (P.
P.G.A.) form factor. The P.P.G.A. form factor is compatible with the 370 pin socket. All
the Intel Celeron processors are available in the plastic pin grid array (PPGA) package.
The PPGA package is compatible with the 370 pin socket and provides more flexibility
to design low cost systems by enabling lower profile and smaller systems and provid-
ing the potential for reducing costs of processor retention and cooling solutions. Like
the Intel Celeron processors that utilize S.E.P.P., the Intel Celeron processors that use
P.P.G.A., feature a P6-microarchitecture-based core processor on a single-sided sub-
strate without BSRAM componentry.
The Intel Celeron processor at 533, 500, 466, 433, 400, 366, 333, and 300A MHz. In-
cludes Intel MMX[tm] media enhancement technology. Offers Dynamic Execution
technology.
Includes a 32Kbyte (16Kbyte/16Kbyte) non-blocking, level-one cache that provides
fast access to heavily used data. Intel Celeron processors at 533, 500, 466, 433, 400,
366, 333 and 300A MHz include integrated L2 cache 128Kbyte. All the Intel Celeron
processor utilize the Intel P6 microarchitectures multi-transaction system bus at
66MHz. The 533, 500, 466, 433, 400, 366, 333 and 300A MHz processors utilize the Intel
P6 microarchitectures multi-transaction system bus with the addition of the L2 cache
interface. The combination of the L2 cache bus and the processor-to-main-memory
system bus increases bandwidth and performance over single-bus processors.
Intel MMX technology includes new instructions and data types that allow
applications to achieve a new level of performance. Intels MMX technology is
designed as a set of basic, general-purpose integer instructions that are easily
Summary of Contents for EP-3WDF2
Page 6: ...EP 3WEF2 3WDF2 Page Left Blank ...
Page 14: ...Introduction EP 3WEF2 3WDF2 Page 1 8 Figure 5 System Block Diagram System Block Diagram ...
Page 17: ...Installation EP 3WEF2 3WDF2 Page 3 1 Section 3 INSTALLATION ...
Page 18: ...Installation EP 3WEF2 3WDF2 Page 3 2 Figure 1 EP 3WEF2 3WDF2 Detailed Layout ...
Page 30: ...Installation EP 3WEF2 3WDF2 Page 3 14 Page Left Blank ...
Page 58: ...BIOS EP 3WEF2 3WDF2 Page 4 28 Page Left Blank ...
Page 60: ...Drivers Installation EP 3WEF2 3WDF2 Page 5 2 Page Left Blank ...
Page 72: ...Appendix EP 3WEF2 3WDF2 A 12 Page Left Blank ...
Page 74: ...Appendix EP 3WEF2 3WDF2 A 14 Page Left Blank ...