Embedian, Inc.
131
SMARC-iMX8MM Computer on Module User’s Manual
v. 1.2
SMARC
Edge
Finger
NXP
i.MX8M
Mini
CPU
Type
Description
Pin#
Pin
Name
Ball
Mode
Signal
Name
S1
CS
I
1_TX+/
I2C_CAM1_CK
D13
ALT0
I2C4_SCL__
I2C4_SCL
IO
OD
Camera1
I2C
bus
clock
S2
CS
I
1_TX
‐
/
I2C_CAM1_DAT
E13
ALT0
I2C4_SDA__
I2C4_SDA
IO
OD
Camera1
I2C
bus
data
S3
GND
P
Ground
S4
RSVD
Not
used
S5
/
I2C_CAM0_CK
D10
ALT0
I2C2_SCL__
I2C2_SCL
IO
OD
Camera0
I2C
bus
clock
S6
CAM_MCK
AC9
ALT6
GPIO1_IO14__
CCMSRCGPCMIX
_CLKO1
O
Master
clock
output
for
CSI
camera
support
S7
CSI0_TX
‐
/
I2C_CAM0_DAT
D9
ALT0
I2C2_SDA__
I2C2_SDA
IO
OD
Camera0
I2C
bus
data
S8
Not
used
S9
CSI0_CK
‐
Not
used
S10
GND
P
Ground
S11
C
Not
used
S12
CSI0_RX0
‐
Not
used
S13
GND
P
Ground
S14
C
Not
used
S15
CSI0_RX1
‐
Not
used
S16
GND
P
Ground