35
Using BIOS
DRAM Configuration
Scroll to this item and press <Enter> to view the following screen:
(Press Enter)
Timing Mode
[Auto]
Item Help
Menu Level
Phoenix-AwardBIOS CMOS Setup Utility
DRAM Configuration
x
Memclock index value or Limi DDR
2
400
DQS Training Control
[Skip DQS]
CKE base power down mode [Enabled]
CKE based powerdown
[Per channel]
Memclock tri-string
[Disabled]
Memory Hole Remapping
[Enabled]
DDRII Timing Item
[Disabled]
TwTr Command Delay
3 bus clocks
Trfc0 for DIMM0
75ns
Trfc1 for DIMM1
75ns
Trfc2 for DIMM2
75ns
Trfc3 for DIMM3
75ns
(Twr) Write Recovery Time 6 bus clocks
(Trtp) Precharge Time
3 Clocks
(Trc)Row Cycle Time
36 bus clocks
(Tcl)CAS# Latency
3
(Trcd)RAS to CAS R/W Delay 6 clocks
(Trrd) RAS to RAS Delay
5 clocks
(Trp)Row Precharge Time 6 clocks
(Tras)Minimum RAS Active T 18 bus clocks
x
x
x
x
x
x
x
x
F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults
: Move Enter: Select +/-/PU/PD:Value F10:Save ESC:Exit F1: General Help
x
x
x
x
x
Timing Mode (Auto)
This item allows you to set up the DRAM timing nanually or automatically.
Memory Clock value or Limi (DDR
2
400)
When DDR
2
Timing Setting by is set to Manual, use this item to set the DRAM frequency.
DQS Training Control (Skip DQS)
CKE based powerdown (Per Channel)
The DRAM channel is placed in power down when all chip selects associated with the
channel are idle.
Memclock tri-stating (Disabled)
This item enables or disables memclock tri-stating function.
Memory Hole Remapping (Enabled)
This item allows users to enable or disable memory hole remapping.
DDRII Timing Item (Disabled)
CKE base power down mode (Enabled)
When in power down mode, if all pages of the DRAMs associated with a CKE pin are
closed, then these parts are placed in power down mode. Only pre-charge power down
mode is supported, not active power down mode.
This item enables or disables users to set DRAM timing.
•
TwTr Command Delay (3 bus clocks)
: Use this item to specify the Write
to Read delay.
•
Trfc 0/1/2/3 for DIMM 0/1/2/3
: Use this item to specify the Row refresh cycle
time.
DQS training is used to place the DQS strobe in the center of the data eye.
Summary of Contents for RS485M-M
Page 1: ......
Page 2: ......
Page 10: ...4 IntroducingtheMotherboard Motherboard Components...
Page 12: ...6 IntroducingtheMotherboard Memo...
Page 32: ...26 InstallingtheMotherboard...
Page 54: ...48 Using BIOS...