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Data Sheets
DS1104 Hardware Installation and Configuration March 2004
159
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ADC
4 x 12-bit ADC
•
4 channels each equipped with one 12-bit sample & hold
ADC
Note: 5 ADC channels (1 x 16-bit + 4 x 12-bit) can be
sampled simultaneous
•
12-bit resolution
•
±10 V input voltage range
•
800 ns conversion time
•
±5 mV offset error
•
±0.5 % gain error
•
4 ppm/K offset drift
•
25 ppm/K gain drift
•
>65 dB signal-to-noise ratio (SNR)
DACs
8 x 16-bit DAC
•
16-bit resolution
•
±10 V output voltage range
•
±5 mA maximum output current
•
Max. 10
µ
s settling time (full scale, accuracy 1/2 LSB)
•
±1 mV offset error
•
±0.1 % gain error
•
13 ppm/K offset drift
•
25 ppm/K gain drift
•
>80 dB signal-to-noise ratio (SNR)
Digital I/O
•
20-bit parallel I/O
•
Single bit selectable for input or output
•
±
5 mA maximum output current
•
TTL output/input levels
Digital Incremental Encoder
Interface
(2 x 24 bit)
•
2 channels
•
Selectable single-ended (TTL) or differential (RS422) input
•
Fourfold line subdivision
•
Max. 1.65 MHz input frequency, i.e. fourfold pulse counts up
to 6.6 MHz
•
24-bit loadable position counter
•
Reset on index
•
5 V/0.5 A sensor supply voltage
Serial interface
•
1 serial UART (universal asynchronous receiver and
transmitter)
•
Selectable transceiver mode: RS232/RS422/RS485
•
Max. baudrate RS232: 115.2 kBaud
•
Max. baudrate RS422/RS485: 1 MBaud
Parameter
Characteristics
Summary of Contents for CLP1104
Page 6: ...Contents DS1104 Hardware Installation and Configuration March 2004 I 6 ...
Page 20: ...Safety Precautions DS1104 Hardware Installation and Configuration March 2004 I 20 ...
Page 118: ...Mapping of I O Signals DS1104 Hardware Installation and Configuration March 2004 I 118 ...
Page 162: ...Data Sheets DS1104 Hardware Installation and Configuration March 2004 I 162 ...