110
3
BIOS Setup
Memory Timing Setting
Move the cursor to this field and press <Enter>, the following
screen will appear:
The settings on the screen are for reference only. Your version may not be
identical to this one.
Memory Timing Setting
The options are Optimal and Expert.
CAS Latency Control (Tcl)
This field is used to select the clock cycle of the CAS latency time.
The option selected specifies the timing delay before SDRAM starts
a read command after receiving it.
RAS# to CAS# Delay (Trcd)
When DRAM refreshes, both rows and columns are addressed
separately. This field is used to select the delay time from RAS (Row
Address Strobe) to CAS (Column Address Strobe) when reading
and writing to the same bank. The lesser the clock cycle, the faster
the DRAM’s performance.
Row Precharge Time (Trp)
The field is used to select the row precharge time, precharge to
active or auto-refresh of the same bank.
F5: Previous Values
F6: Fail-Safe Defaults
F7: Optimized Defaults
Phoenix - AwardBIOS CMOS Setup Utility
Memory Timing Setting
Item Help
Menu Level
XX
↑↓
: Move
PU/PD/+/-: Change Priority
F10: Save
ESC: Exit
Parameters
Memory Timing Setting
x CAS Latency Control (Tcl)
x RAS# to CAS# Delay (Trcd)
x Row Precharge Time (Trp)
x Min RAS# Active Time (Tras)
s Command Per Clock (CMD)
** Advanced Memory Settings **
x Bank to Bank Cmd (TRRD)
x Row Cycle Time (Trc)
x Write Recovery (TWR)
x Write-Read Command (TWTR)
x Refresh to Active (TRFC)
Setting
Optimal
Auto(5)
Auto(5)
Auto(5)
Auto(18)
Auto(2T)
Auto(3)
Auto(22)
Auto(5)
Auto(9)
Auto
Select [Expert] to
enter things manually.
Current Value
5
5
5
18
2T
3
22
4
9
7.8uS
