Denon S-5BD, Service Manual

Page: 143 / 207

143
SII9134CTU Pin Functions
38
DBP-4010UDCI/DBP-4010UD
SII9134CTU Pin Function
Pin
Name
Pin # Type Dir Description
D0 98 LVTTL Input These are the lower 12 bits of the 36-bit pixel bus. These pins are highly con-
figurable and support multiple RGB and YCbCr formats. See Data Bus Map-
pings on page 30 for complete information.
D1 97 LVTTL Input
D2 96 LVTTL Input
D3 95 LVTTL Input
D4 94 LVTTL Input
D5 93 LVTTL Input
D6 92 LVTTL Input
D7 91 LVTTL Input
D8 90 LVTTL Input
D9 86 LVTTL Input
D10 85 LVTTL Input
D11 84 LVTTL Input
D12 83 LVTTL Input These are the middle 12 bits of the 36-bit pixel bus.
D13 82 LVTTL Input
D14 81 LVTTL Input
D15 80 LVTTL Input
D16 79 LVTTL Input
D17 78 LVTTL Input
D18 77 LVTTL Input
D19 75 LVTTL Input
D20 74 LVTTL Input
D21 73 LVTTL Input
D22 72 LVTTL Input
D23 71 LVTTL Input
D24 70 LVTTL Input These are the middle 12 bits of the 36-bit pixel bus.
D25 69 LVTTL Input
D26 68 LVTTL Input
D27 67 LVTTL Input
D28 63 LVTTL Input
D29 62 LVTTL Input
D30 61 LVTTL Input
D31 60 LVTTL Input
D32 59 LVTTL Input
D33 58 LVTTL Input
D34 57 LVTTL Input
D35 56 LVTTL Input
IDCK 88 LVTTL Input Input Data Clock
DE 1 LVTTL Input Data enable
HSYNC 2 LVTTL Input Horizontal Sync input control signal
VSYNC 3 LVTTL Input Vertical Sync input control signal
SCK 11 LVTTL Input I2S Serial Clock
WS 10 LVTTL Input I2S Word Select
SD0 9 LVTTL Input I2S Serial Data
SD1 8 LVTTL Input I2S Serial Data
SD2 7 LVTTL Input I2S Serial Data
SD3 6 LVTTL Input I2S Serial Data
DL0 17 LVTTL Input One-bit Audio Data Left 0
DR0 16 LVTTL Input One-bit Audio Data Right 0
DL1 19 LVTTL Input One-bit Audio Data Left 1
DR1 18 LVTTL Input One-bit Audio Data Right 1
DL2 21 LVTTL Input One-bit Audio Data Left 2
DR2 20 LVTTL Input One-bit Audio Data Right 2
DL3 23 LVTTL Input One-bit Audio Data Left 3
DR3 22 LVTTL Input One-bit Audio Data Right 3
DCLK 15 LVTTL Input One-bit Audio Clock Input
MCLK 5 LVTTL Input Audio Input Master Clock
SPDIF 4 LVTTL Input S/PDIF Audio Input