Denon S-5BD, Service Manual

Page: 139 / 207

139
R5F3650TNFD Terminal Functions
Pin Pin Name Symbol I/O Type Det
Op
(Int.)
Pu/Pd
(Ext.)
Res P.OFF PURE
D
CEC
STBY Q.STBY
CEC +
Q STBY
Function
1 P94 VSEL DATA O C - - - Z Z O/L O/L O/L O/L GUI built-in VIDEO SW cotrol pin
2 P93 DIRCE O C - - - Z Z O/L O/L O/L O/L DIR cotrol pin(LC89058W-E):Communication enable
3 P92/SOUT3 DIRDIN O C - - - Z Z O/L O/L O/L O/L DIR cotrol pin(LC89058W-E):Communication cereal data
4 P91/SIN3 DIRDOUT I - Lv - - Z Z - - - - DIR cotrol pin(LC89058W-E):Communication cereal data
5 P90/CLK3 DIRCLK O C - - - Z Z O/L O/L O/L O/L DIR cotrol pin(LC89058W-E):Communication serial clock
6 BYTE BYTE - - - - - - - - - - - GND(Ext. data bus bit width switching, 16bit : L)
7 CNVCS
CNVSS/
SUBUPDATE
- - - - Pd - - - - - -
Single-chip / Micro-processor mode switching (Normal
single-chip : L, Rewrite boot program start : H input set)
8 P87 (PLDMUTE) O C - - AD3VPu Z Z O/H O/L O/L O/L
(PLDMUTE terminal reserve: ( H : mute)) Hardware
always present "H"
9 P86 NC O C - - - Z Z O/L O/L O/L O/L Non
10 RESET SUBRESET I - Lv - SCPU3VPu L Z - - - - Reset input
11 XOUT X1 O - - - - - - - - - - Oscillator connection
12 VSS VSS - - - - - - - - - - - GND
13 XIN X2 I - - - - - - - - - - Oscillator connection
14 VCC VCC - - - - - - - - - - +3.3V
15 P85/NMI/
(CEC)
NMI/(CEC_IN) I - - - - - - - - - - "H" fixed / Reserve (16pin CEC-D signal input for TEST)
16 P84/INT2 CEC_IN I - E↓&L - SCPU3VPu Z Z - - - - CEC-D signal input pin
17 P83/INT1 ACK SIMO I - E↓&L - - Z Z - - - -
MAIN-SUB ucom communication control input pin (MCUs
Hack from the main "L" Return)
18 P82/INT0 SUB BDOWN I - E↓&L - Z Z - - - - Power down detect (Power down: L)
19 P81 NC O C - - - Z Z O/H O/L O/L O/L Non
20 P80/(RXD5) GUI WRITE O C - - - Z O/L O/L - - - GUI ROM rewrite control (ACTIVE"L")
21 P77/(CLK5) SICODECCO I - - - - Z Z O/L O/L O/L O/L CODEC control terminal: Communication cereal data
22 P76/(TXD5) A PLD CS /
TMS/"D/M"
O C - - - Z O/L O/L - - -
A PLD control pin: CS / PLD rewriting (JTAG) / DENON
WRITTER / MITSUBISHI rewritten for determining (DW =
"L")
23 P75
A PLD DATA/
TDI
O C - - - Z Z O/L O/L O/L O/L A PLD cotrol pin /PLDrewrite control (JTAG)
24 P74
A PLD CLK/
MTCK
O C - - - Z Z O/L O/L O/L O/L A PLD cotrol pin:CLK/PLDrewrite control (JTAG)
25 P73/CTS2 DA POWER O C - - - Z Z O/L O/L O/L O/L ODEC power terminal (H : ON)
26 P72/CLK2 D_POWER O C - - - Z Z Z O/L O/H O/H DIGITAL power ON/OFF control (H: ON)
27 P71/RXD2/
SCLMM
HSCL(400k) I/O N - - CEC3VPu Z O/L O/L O/L O/L O/L
HDMI_RECEIVER(ADV7840)/HDMI TRANSMITTER1
(ADV7510)
28 P70/TXD2/
SDAMM
HSDA(400k) I/O N - - CEC3VPu Z O/L O/L O/L O/L O/L
HDMI_RECEIVER(ADV7840)/HDMI TRANSMITTER1
(ADV7510)
29 P67/TXD1 TXD O C - - SCPU3VPu Z Z - - - - Data transmission output to the outside (RS-232C)
30 P66/RXD1 RXD I - Lv - SCPU3VPu Z Z - - - - Data reception input from the outside (RS-232C)
31 P65/CLK1 SWSUM O C - - - Z Z - O/L O/L O/L SWSUM (FRONT+SW signal) control pin (H:ON,L:OFF)
32 P64/CTS1 NC O - Lv - Ed Z Z - - - - Non
33 P63/TXD0 SOMI O C - - - Z Z - - - - MAIN-SUB ucon communication control pin:Sserial data
34 P62/RXD0 SIMO I - - - - Z Z - - - - MAIN-SUB ucon communication control pin:Sserial data
35 P61/CLK0 CLK SIMO I - - - - Z Z - - - - MAIN-SUB ucon communication control pin:Serial clock
36 P60/CTS0 REQ SOMI O C - - - Z Z - - - - MAIN-SUB ucon communication control pin:Request
37 P57 NC O C - - SCPU3VPu Z Z O/H - - - Non
38 P56 HPD2 O C - - - Z Z O/L - - - HD DET cotrol pin
39 P55/EPM /EPM O C - - Ed Z Z - - - - /Rewriting boot startup "L" type configuration
40 P54 CEC_OUT O C - - - Z Z O/L - - - CEC-D signal output pin
41 P53 NC O C - - Z Z O/L O/L O/L O/L Non
42 P52 NC O C - - - Z Z O/L O/L O/L O/L Non
43 P51 VSEL C2 O C - - - Z Z O/L O/L O/L O/L GUI built-in VIDEO SW cotrol pin