Denon DN-V1700, Service Manual

Page: 22 / 51

22
DN-V1700
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
GND
P5
P6
P7
P8
P9
P10
P11
P12
P13 P14 P15
HSYNC
FIELD/SYNC
BL
ANK
ALSB
GND GND
RESET
V
DAC A
DAC B
V
AA
V
AA
V
AA
REF
V
AA
V
AA
GND
DAC D
DAC C
COMP
SDATA
SCLOCK
GND CL
OCK
P4 P3 P2 P1 P0 TTX TTXREQ R
SET
SCRESET/RTC
12 13 14 15 16 17 18 19 20 21 22
34 35 36 37 38 39 4 0 4 1 4 2 4 3 4 4
TOP VIEW
ADV7170KSU (IC402)
1 VAA P Power supply (+3V~+5V)
2 P5 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
3 P6 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
4 P7 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
5 P8 I 16-bit YCrCb pixel port (P15-P8)
6 P9 I 16-bit YCrCb pixel port (P15-P8)
7 P10 I 16-bit YCrCb pixel port (P15-P8)
8 P11 I 16-bit YCrCb pixel port (P15-P8)
9 P12 I 16-bit YCrCb pixel port (P15-P8)
10 GND G GND
11 VAA P Power supply (+3V~+5V)
12 P13 I 16-bit YCrCb pixel port (P15-P8)
13 P14 I 16-bit YCrCb pixel port (P15-P8)
14 P15 I 16-bit YCrCb pixel port (P15-P8)
15 HSYNC I/O /HSYNC (Modes 1 and 2) control signal
16 FIELD/VSYNC I/O Dual function FIELD (Mode 1) and /VSYNC (Mode 2) control signal
17 BLANK I/O Video blanking control signal
18 ALSB I TTL address input
19 GND G GND
20 VAA P Power supply (+3V~+5V)
21 GND G GND
22 RESET I The input resets the on chip timing generator
23 SCLOCK I MPU port serial interface clock input
24 SDATA I/O MPU port serial data input/output
25 COMP O Compensation capacitor connect pin
26 DAC C O RED/S-Video C/V analog output
27 DAC D O GREEN/S-Video Y/Y analog output
28 VAA P Power supply (+3V~+5V)
29 GND G GND
30 VAA P Power supply (+3V~+5V)
31 DAC B O BLUE/Composite/U analog output
32 DAC A O PAL/NTSC composite video signal output
33 VREF I/O Voltage reference input for DACs or voltage reference output (1.235V)
34 RSET I Resistor connect pin to control full-scale amplitudes of the video signals
35 SCRESET/RTC I Sub-carrier reset / Real time control (RTC) input
36 TTXREQ/GND O Teletext data request signal / Default to GND when teletext not selected
37 TTX/VAA I Teletext data / Default to VAA when teletext not selected
38 P0 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
39 P1 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
40 P2 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
41 P3 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
42 P4 I 8-bit 4:2:2 multiplexed YCrCb pixel port (P7-P0)
43 GND G GND
44 CLOCK I TTL clock input, requires a stable 27MHz reference clock
ADV7170KSU Terminal Function
Function
Pin
No.
Pin Name I/O