Dave Embedded Systems ARM Cortex-A9 MPCore, Quick Start Manual

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B E L K Q u i c k S t a r t G u i d e v . 1 . 0 . 9
●
copy the
<bora_repo>/boards/board_parts/zynq/BORA
and
<bora_repo>/boards/board_parts/zynq/BORAX
directories to
<vivado_2014.4_install_dir>/data/boards/board_
parts/zynq/
:
cd <bora_repo>
sudo cp -r boards/board_parts/zynq/BORA
/opt/Xilinx/Vivado/2014.4/data/boards/board_pa
rts/zynq/
sudo cp -r boards/board_parts/zynq/BORAX
/opt/Xilinx/Vivado/2014.4/data/boards/board_pa
rts/zynq/
●
enter the git directory and launch the following
command
export PROJ_DIR=$
(pwd)/../bora-build-YYYYMMDD-nobk
●
launch the Vivado Design Suite with the following
commands:
. /opt/Xilinx/Vivado/2014.4/settings64.sh 4
vivado -mode tcl -source build_project.tcl
-notrace -tclargs "-bitstream"
5
●
the
build_project
script allows the user to select
BORA or BORAX target
●
at the end of the bitstream build process, the
build_project
script allows to automatically export
hardware and lauch SDK to build the FSBL
●
once the Xilinx SDK is ready, perform the following
operations from the GUI:

Click on File -> New -> Application Project

Select the Project Name : bora_FSBL

Click Next
4 In a 32 bit system, Vivado settings are configured with the following command
/opt/Xilinx/Vivado/2014.4/settings32.sh
5 Passing the -tclargs "-bitstream" parameters allows for automatic building of the FPGA bitstream.
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