FR, MB91460, FR Clocks
Document No. 002-05317 Rev. *C
13
Clock modulator can be enabled and disable by setting parameter
CLOMO
to
ON/OFF
Please refer to the data sheet of the device if you enable clock modulation. The register CMPR dependant on the
PLL-Clock.
If the
CLKCAN
source is set either to main oscillator or to PLL output then the clock for the CAN is not influenced by
the clock modulation. If the
CLKCAN
source is set CPU clock (
CLKB
) then the clock for the CAN is also modulated (if
the clock modulator is enabled).
If the clock modulator is enabled, the wait states of the internal flash wait states must be adapted to maximum
frequency. Please check the wait states settings.
Clock modulator feature is not supported by every device, e.g. MB91461. Please check the data sheet.
AN205200 - FR Family MB91460 Series, Start91460.asm
for further details about using
start.asm
5
Clock setup sequence
First set Clock source (Base Clock) for the three clock tree selections. This selected Base clock is used to select
afterwards the 3 Clocks for the different internal trees. When PLL is used, first PLL multiplication ratio is set and PLL
is enabled. After waiting the PLL stabilization time via time base time, PLL clock is selected as clock source
To avoid voltage drops and surges when switching the clock source from oscillator to high frequency PLL/ DLL output
(or vice versa), a clock smooth gear-up and gear-down circuitry is implemented with the PLL interface.
;===========================================================================
; 4.7.2 Select Clock Modulator
;============================================================================
;
#set CLOMO OFF ; <<< Enable /disable clock modulator
#set CMPR 0x026F ; <<< Ref. to the data sheet, CMPR
