Cypress Semiconductor CY8C23433, Specification Sheet

Page: 25 / 37

CY8C23433, CY8C23533
Document Number: 001-44369 Rev. *B Page 25 of 37
AC Electrical Characteristics
AC Chip-Level Specifications
The following table lists the guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
° C
≤
T
A
≤
85 ° C, or 3.0V to 3.6V and -40 ° C
≤
T
A
≤
85 ° C, respectively. Typical parameters apply to 5V and 3.3V at 25 ° C and
are for design guidance only.
Table 24. 5V and 3.3V AC Chip-Level Specifications
Symbol Description Min Typ Max Units Notes
F
IMO24
Internal Main Oscillator Frequency for 24
MHz 23.4 24
24.6
[13],[14],[15] MHz Trimmed for 5V or 3.3V
operation using factory trim
values. See
Figure 8 on page 14.
SLIMO mode = 0.
F
IMO6
Internal Main Oscillator Frequency for 6 MHz 5.75 6
6.35
[13],[14],[15] MHz Trimmed for 5V or 3.3V
operation using factory trim
values. See
Figure 8 on page 14.
SLIMO mode = 1.
F
CPU1
CPU Frequency (5V Nominal) 0.093 24
24.6
[13],[14] MHz
F
CPU2
CPU Frequency (3.3V Nominal) 0.093 12
12.3
[13],[14]
MHz
F
48M
Digital PSoC Block Frequency 0 48
49.2
[13],[14],[16] MHz Refer to the AC Digital Block
Specifications.
F
24M
Digital PSoC Block Frequency 0 24
24.6
[14],[16] MHz
F
32K1
Internal Low Speed Oscillator Frequency 15 32 75 kHz
F
32K2
External Crystal Oscillator – 32.768 – kHz Accuracy is capacitor and crystal
dependent. 50% duty cycle.
F
PLL
PLL Frequency – 23.986 – MHz Is a multiple (x732) of crystal
frequency.
Jitter24M2 24 MHz Period Jitter (PLL) – – 600 ps
T
PLLSLEW
PLL Lock Time 0.5 – 10 ms
T
PLLSLEWSLOW
PLL Lock Time for Low Gain Setting 0.5 – 50 ms
T
OS
External Crystal Oscillator Startup to 1% – 1700 2620 ms
T
OSACC
External Crystal Oscillator Startup to 100 ppm – 2800 3800 ms The crystal oscillator frequency
is within 100 ppm of its final value
by the end of the T
osacc
period.
Correct operation assumes a
properly loaded 1 uW maximum
drive level 32.768 kHz crystal.
3.0V
≤
Vdd
≤
5.5V, -40
°C
≤
T
A
≤
85
°C
.
Jitter32k 32 kHz Period Jitter – 100 ns
T
XRST
External Reset Pulse Width 10 – –
μ
s
DC24M 24 MHz Duty Cycle 40 50 60 %
Step24M 24 MHz Trim Step Size – 50 – kHz
Fout48M 48 MHz Output Frequency 46.8 48.0
49.2
[13],[15] MHz Trimmed. Using factory trim
values.
Jitter24M1R 24 MHz Period Jitter (IMO) Root Mean
Squared – – 600 ps
F
MAX
Maximum frequency of signal on row input or
row output. – – 12.3 MHz
T
RAMP
Supply Ramp Time 0 – –
μ
s
Notes
13. 4.75V < Vdd < 5.25V.
14. Accuracy derived from Internal Main Oscillator with appropriate trim for Vdd range.
15. 3.0V < Vdd < 3.6V. See Application Note
AN2012 “Adjusting PSoC Microcontroller Trims for Dual Voltage-Range Operation” for information on trimming for operation
at 3.3V.
16. See the individual user module data sheets for information on maximum frequencies for user modules.
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