Cypress Semiconductor CY8C23433, Specification Sheet

Page: 12 / 37

CY8C23433, CY8C23533
Document Number: 001-44369 Rev. *B Page 12 of 37
3E 7E BE CPU_SCR1 FE #
3F 7F BF CPU_SCR0 FF #
Table 6. Register Map Bank 0 Table: User Space
(continued)
Nam
e
Addr
(0
,H
ex
)
Acce
ss
Nam
e
Addr
(0
,H
ex
)
Acce
ss
Nam
e
Addr
(0
,H
ex
)
Acce
ss
Nam
e
Addr
(0
,H
ex
)
Acce
ss
Gray fields are reserved. # Access is bit specific.
Table 7. Register Map Bank 1 Table: Configuration Space
Na
m
e
Ad
dr
(1,
H
ex)
Acces
s
Na
m
e
Ad
dr
(1,
H
ex)
Acces
s
Na
m
e
Ad
dr
(1,
H
ex)
Acces
s
Na
m
e
Ad
dr
(1,
H
ex)
Acces
s
PRT0DM0 00 RW 40 80 C0
PRT0DM1 01 RW 41 81 C1
PRT0IC0 02 RW 42 82 C2
PRT0IC1 03 RW 43 83 C3
PRT1DM0 04 RW 44 ASD11CR0 84 RW C4
PRT1DM1 05 RW 45 ASD11CR1 85 RW C5
PRT1IC0 06 RW 46 ASD11CR2 86 RW C6
PRT1IC1 07 RW 47 ASD11CR3 87 RW C7
PRT2DM0 08 RW 48 88 C8
PRT2DM1 09 RW 49 89 C9
PRT2IC0 0A RW 4A 8A CA
PRT2IC1 0B RW 4B 8B CB
PRT3DM0 0C RW 4C 8C CC
PRT3DM1 0D RW 4D 8D CD
PRT3IC0 0E RW 4E 8E CE
PRT3IC1 0F RW 4F 8F CF
10 50 90 GDI_O_IN D0 RW
11 51 91 GDI_E_IN D1 RW
12 52 92 GDI_O_OU D2 RW
13 53 93 GDI_E_OU D3 RW
14 54 ASC21CR0 94 RW D4
15 55 ASC21CR1 95 RW D5
16 56 ASC21CR2 96 RW D6
17 57 ASC21CR3 97 RW D7
18 58 98 D8
19 59 99 D9
1A 5A 9A DA
1B 5B 9B DB
1C 5C 9C DC
1D 5D 9D OSC_GO_EN DD RW
1E 5E 9E OSC_CR4 DE RW
1F 5F 9F OSC_CR3 DF RW
DBB00FN 20 RW CLK_CR0 60 RW A0 OSC_CR0 E0 RW
DBB00IN 21 RW CLK_CR1 61 RW A1 OSC_CR1 E1 RW
DBB00OU 22 RW ABF_CR0 62 RW A2 OSC_CR2 E2 RW
23 AMD_CR0 63 RW A3 VLT_CR E3 RW
DBB01FN 24 RW 64 A4 VLT_CMP E4 R
DBB01IN 25 RW 65 A5 E5
DBB01OU 26 RW AMD_CR1 66 RW A6 E6
27 ALT_CR0 67 RW A7 E7
DCB02FN 28 RW 68 SARADC_TRS A8 RW IMO_TR E8 W
DCB02IN 29 RW 69 SARADC_TRCL A9 RW ILO_TR E9 W
DCB02OU 2A RW 6A SARADC_TRCH AA RW BDG_TR EA RW
2B 6B SARADC_CR2 AB # ECO_TR EB W
DCB03FN 2C RW TMP_DR0 6C RW SARADC_LCR AC RW EC
DCB03IN 2D RW TMP_DR1 6D RW AD ED
DCB03OU 2E RW TMP_DR2 6E RW AE EE
2F TMP_DR3 6F RW AF EF
30 ACB00CR3 70 RW RDI0RI B0 RW F0
31 ACB00CR0 71 RW RDI0SYN B1 RW F1
32 ACB00CR1 72 RW RDI0IS B2 RW F2
33 ACB00CR2 73 RW RDI0LT0 B3 RW F3
34 ACB01CR3 74 RW RDI0LT1 B4 RW F4
Gray fields are reserved. # Access is bit specific.
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