C
OMPACT
CHAMP-AV IV U
SER
’
S
M
ANUAL
C
URTISS
-W
RIGHT
C
ONTROLS
E
MBEDDED
C
OMPUTING
1-18
814256 V
ERSION
2 F
EBRUARY
2006
E
THERNET
I
NTERFACES
The Compact CHAMP-AV IV has five Gigabit Ethernet interfaces, one per processor.
Processors A-D (MPC7447A/7448) use the Gigabit Ethernet MAC located in their associated
MV64660 (Discovery III) bridge. There are two Ethernet interfaces per Discovery III,
Ethernet 0 and Ethernet 1. Only Ethernet 0 is used. The Discovery III bridge implements a
number of features that are designed to minimize processor loading due to Ethernet traffic.
These include dedicated DMA engines, support for Jumbo packets up to 9 Kbytes, automatic
retransmission following a collision, efficient buffer management schemes and checksum
calculations for TCP, IP and UDP.
The Gig-E interface for each processor is physically connected to a Marvell MV88E1145 Quad
Gigabit Ethernet Physical layer device (Quad-PHY). Each processor also has a management
interface to the Quad-PHY to control the device and read status. The MV88E1145 has a
number of useful features such as auto-negotiation, MDI/MDIX crossover and polarity
reversal. Auto-negotiation enables the Ethernet interface to negotiate to highest speed
(10/100/1000 Mbps) supported by all devices on an Ethernet segment. The Quad-PHY can
automatically determine whether or not it needs to cross over between pairs so that an
external crossover cable is not required. The Quad-PHY also detects and corrects for polarity
reversal on receive pairs in 1000Base-T and 10Base-T modes, in 100Base-T polarity reversal
does not matter. Each Discovery III uses an RGMII (Reduced Gigabit Media Independent
Interface) to transfer data between itself and the Quad-PHY.
Processor E (MPC8540) uses its internal Gigabit Ethernet MAC interface. The 8540 Ethernet
controller also implements a number of features that are designed to minimize processor
loading due to Ethernet traffic. These include dedicated DMA engines, automatic
retransmission following a collision, efficient buffer management schemes and checksum
calculations for TCP, IP and UDP.
The MPC8540 Gig-E interface is physically connected to a Marvell MV88E1111 Gigabit
Ethernet Physical layer device (PHY). The 8540 also has a management interface to the PHY
to control the device and read status. The MV88E1111 is a one channel version of the
MV88E1145 and has similar features. The MPC8540 uses a GMII (Gigabit Media Independent
Interface) to transfer data between itself and the PHY.
P
OWER
The Compact CHAMP-AV IV has the following power distribution/monitoring capabilities:
• Power monitoring of backplane 3.3 and 5 Volts: If a low voltage condition is detected
on either of the backplane voltages, then the on-board power planes will be disabled.
The cPCI interface power is not disabled.
• Power sequencing: 5V, 3.3V and all on-board power supply outputs are sequenced to
protect components. They power up at the same time as the backplane power.
• The Compact CHAMP-AV IV includes monitoring circuitry that activates board reset
upon the following conditions:
– Low voltage condition (all on-board power rails are monitored)
– Power up
– Front panel reset
– Software generated reset
– cPCI system reset
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