C
OMPACT
CHAMP-AV IV U
SER
’
S
M
ANUAL
C
URTISS
-W
RIGHT
C
ONTROLS
E
MBEDDED
C
OMPUTING
4-2
814256 V
ERSION
2 F
EBRUARY
2006
C
OMPACT
CHAMP-AV IV M
EMORY
M
AP
The resources on the Compact CHAMP-AV IV are connected via four unique PCI buses. Since
all nodes of the Compact CHAMP-AV IV are connected together by the PCI buses, all memory
on the board is globally accessible.
Each processor has a specific view of the board. Differences from one processor's view to
the next are due to the fact that each processor views its own memory, bridge, and FPGA
port as starting at zero and extending through the first 512 MB of address space, while the
PCI address space for these assets never starts at zero. PMC devices will view board
resources using the PCI memory map, where all processors start at a nonzero memory
address.
Table 4.1 on page 4-3 shows the physical memory maps for all processors, and for PMC-
initiated transfers. No device may select itself using its own PCI address space. Entries
designated "illegal" result in a PCI transfer error. Unlisted entries also result in errors. The
logical address map imposed by an operating system may result in further limitations.
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