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Appendix
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SPT-100A22TP01, SPT-100A22TP02 Reference Manual (Hardware)
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Baud Rate Settings
A baud rate is set by software by dividing the clock input (1.8432MHz). The baud rate in terms of
hardware can be set to a maximum of 115,200 bps for SERIALA, B. The baud rates available in practice
depend on the operating environment (cable, software, etc.). The table below lists typical baud rates
and their respective values to be written to the divisor latch register (LSB, MSB).
Baud Rate Settings
Baud rate to be set
SERIAL A, B
Clock input (1.8432MHz)
Value to be set in the divisor register
(Decimal)
Setting error (%)
50
2304
---
75
1536
---
110
1047
0.026
134.5
857
0.058
150
768
---
300
384
---
600
192
---
1200
96
---
1800
64
---
2000
58
0.69
2400
48
---
3600
32
---
4800
24
---
7200
16
---
9600
12
---
14400
8
---
19200
6
---
28800
4
---
38400
3
---
57600
2
---
76800
---
---
115200
1
---
153600
---
---
230400
---
---
Example : To set 9,600 bps, write "00" to the (MSB) divisor latch register and "12 (decimal)" to the
(LSB) divisor latch register.
