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CHAPTER 6 - BIOS SETUP

PC-686 (CPCI)-LV User’s Manual

Reload Global Timer Event

When enabled, an event occurring on each device listed below restarts the global time

for Standby mode.

IRQ (3 – 7, 9 – 15), NMI

Primary IDE 0

Primary IDE 1

Secondary IDE 0

Secondary IDE 1

FDD, COM, LPT Port

PCI PIRQ[A-D] #

Summary of Contents for PC-686CPCI-LV

Page 1: ...PC 686 CPCI LV CompactPCI Single Board Computer For socket 370 CPU Celeron Pentium III With LAN VGA User s Manual ...

Page 2: ......

Page 3: ...o responsibility for any errors that may appear in this document nor for results obtained by the user as a result of using this product Acknowledgments IBM AT and PS 2 are trademarks of International Business Machines Corporation Award is a registered trademark of Award Software International Inc Intel Celeron and Pentium III are registered trademarks of Intel Corporation Microsoft Windows is a re...

Page 4: ...s not applicable if the device has been tampered with or damaged through abuse mistreatment neglect or unreasonable use or if the original invoice is not included in which case repairs will be considered beyond the warranty policy How to Obtain Service For replacement or repair return the device freight prepaid with a copy of the original invoice Please obtain a Return Merchandise Authorization Nu...

Page 5: ...allation procedure 13 2 2 CPU Installation 14 2 3 Main Memory Installation DIMM1 DIMM2 DIMM3 15 2 4 RJ 45 LAN connector CN1 20 2 5 Serial Port connector CN2 21 2 6 Parallel Port Connector CN3 23 2 7 PS 2 Mouse Keyboard stack Connector CN4 24 2 8 USB Connector CN5 24 2 9 VGA Connector CN6 26 2 10 LCD Connector CN7 27 2 11 CPU FAN Connector CN8 28 2 12 Floppy Disk Connector CN9 29 2 13 External Batt...

Page 6: ...P6 39 3 6 DISK ON CHIP Memory Add Selector JP7 40 3 7 Display Type Setting JP8 40 3 8 CPU frequency ration setting JP9 40 3 9 Clear CMOS Content JP10 41 3 10 External Internal battery selector JP11 41 CHAPTER 4 CPU BOARD RESOURCES 43 4 1 I O MAP 43 4 2 MEMORY MAP 44 4 3 DMA Channels 45 4 4 PCI Configuration Space Map 45 4 5 Interrupters 46 4 6 PCI Interrupters Routing Map 47 CHAPTER 5 SOFTWARE UTI...

Page 7: ... 3 Standard CMOS Setup 70 6 4 BIOS Features Setup 72 6 5 Chipset Features Setup 76 6 6 Power Management Setup 80 6 7 PnP PCI Configuration 85 6 8 Defaults Menu 88 6 9 Integrated Peripherals 89 6 10 Supervisor User Password Setting 92 6 11 Exit Selecting 93 6 12 POST Messages 94 6 13 POST Beep 94 6 14 Error Messages 95 6 15 POST Codes 101 ...

Page 8: ...Table of Contents iv PC 686 CPCI LV User s Manual ...

Page 9: ...168 pin DIMM sockets for SDRAM in 8MB 16MB 32MB 64MB 128MB and 256MB configurations BIOS Award BIOS PnP support Flash EEPROM 256KB for BIOS update Power management Frequency Voltage control Bus Speed 66MHz 100MHz Super I O Winbond W83977TF chipset Parallel port One high speed parallel port SPP EPP ECP mode Series Port Two 16550 UART port COM2 is RS 232C RS 422 RS 485 configurable Enhanced IDE One ...

Page 10: ... controller RJ 45 connector SSD DIP socket supports DiskOnChip flash disks 2MB 144MB RTC battery backup by Lithium Battery CR2032 The coin type Lithium battery specification is shown in table Specification CR2032 Nominal Voltage 3V Nominal Capacity 220mAh Nominal Weight 3 1g 1 2 Mechanical Environmental POWER CONSUMPTION Pentium III 700MHz 5VDC 6 50A Max 12VDC 250mA Max 3 3VDC 4 00A Max Celeron 56...

Page 11: ...ual Registration Card 1 IDE 40pin Ribbon Cable 1 Floppy Ribbon Cable Driver disks utilities floppy Jumper Short Pin 6pcs 1 5pin DIN to 6pin mini DIN Cable LCD exchange Display Board for OEM Memory optional 168PIN DIMM PC100 SDRAM 32MB PC MSD32 100 168PIN DIMM PC100 SDRAM 64MB PC MSD64 100 168PIN DIMM PC100 SDRAM 128MB PC MSD128 100 168PIN DIMM PC100 SDRAM 256MB PC MSD256 100 168PIN DIMM PC100 SDRA...

Page 12: ... to protect your processor from overheating Winbond W83977HF chipset Wired for Management WFM 2 0 specification compliance The PC 686 CPCI has a LAN I F that uses Intel 82559 PCI LAN controller The PC 686 CPCI has a LCD Graphics that uses Chips 69000 graphic accelerator The Chips 69000 features are show as following Integrated SDRAM Memory 2MB integrated memory 83 MHz SDRAM operation Low Power Con...

Page 13: ...rs 128x128 pixels by 2 colors Standards Supported Fully IBM VGA Compatible ACPI VESA DPMS and DDC 1 2 Flexible Panel Support TFT DSTN Color and Monochrome VGA SVGA XGA Auto Panel Power On Off Sequencing Multimedia video Acceleration Zoomed Video Port YUV RGB data capture from video port or host bus Color Space Conversion YUV RGB Horizontal and vertical interpolation Double Buffering Hardware Inter...

Page 14: ...chip Power Management Standby mode Panel off power saving mode Zero volt suspend Eight GPIO pins Activity Detection Output Pin C T 69000 Graphic Accelerator Refresh Rates Resolution Color 60 Hz 75 Hz 85 Hz 8bbp O O O 16bbp O O O 640x480 24bbp O O O 8bbp O O O 16bbp O O O 800x600 24bbp O O O 8bbp O O O 1024x768 16bbp O O O 1280x1024 8bbp O O ...

Page 15: ...RAM L2 cache does not need to be executing cycles and therefore can be placed in Standby mode Peripheral Device Management Peripheral device resources are monitored to detect when a specific device is idle PIIX4 then informs system power management software which can place that individual device into a power managed condition such as Local Standby or Powered Off Accesses targeting that device are ...

Page 16: ...mer also active during suspend to monitor for overall system idleness and as a resume timer Power Button Input Override feature forcing immediate transition to Soft Off Battery Low indication pin Shadow registers for standard AT write only registers to save and restore system state information Resume Well to monitor wake up events during suspend Resume power and reset sequencing ...

Page 17: ...ption For typical configurations the CPU board is designed to operate with at least a 200W power supply A higher wattage power supply should be used for heavily loaded configurations The power supply must meet the following requirements Ÿ Rise time for power supply 2ms to 20ms Ÿ Minimum delay for reset to Power Good 100ms Ÿ Minimum Powerdown warning 1ms Ÿ 3 3V output must reach its minimum regulat...

Page 18: ...CHAPTER 1 Introduction 10 PC 686 CPCI LV User s Manual 1 7 Connector Jumper Location ...

Page 19: ...er s Manual 11 1 8 Block Diagram LAN DIMM X 3 KB MS COM 1 2 443BX PIIX4E FDD USB 1 2 BIOS LPT TERMINATOR GTL SOCKET 370 VRM SUPER I O VGA MONITOR CLK GEN IDE 1 2 COMPACT PCI CONNECTOR H W W83977TF 82559ER 69000 82371EB GTL BUS PCI BUS ISA BUS ...

Page 20: ...CHAPTER 1 Introduction 12 PC 686 CPCI LV User s Manual ...

Page 21: ...top of the processor and connect it to FAN connector 2 1 4 Insert all external cables except for flat panel Hard disk floppy keyboard Mouse LAN etc 2 1 5 Prepare a CRT monitor for CMOS setup 2 1 6 Confirm the power supply of Backplane is off 2 1 7 Insert the CPU board to Backplane 2 1 8 Turn on the power 2 1 9 Enter the BIOS setup mode by pressing Del key during boot up 2 1 10 Use the Load BIOS Op...

Page 22: ...sor Processor Speed Host Bus frequency Cache size Celeron 566MHz 66MHz 128KB 600MHz 100MHz 256KB Pentium III 700MHz 100MHz 256KB The ZIF PPGA socket comes with a lever to secure the processor Make sure the notch on the corner of the CPU corresponds with the notch on the inside of the socket After you have installed the processor into the socket 370 check if the configuration setup for the CPU type...

Page 23: ...ckets The CPU board supports the following memory features 168 pin DIMMs with gold plated contacts 100 MHz SDRAM Non ECC 64 bit and ECC 72 bit memory 3 3V memory only Unbuffered single or double sided DIMMs in the following sizes 2 3 1 SDRAM SYNCHRONOUS DRAM SDRAM improves memory performance through memory access that is synchronous with the memory clock Burst transfer rates at x 1 1 1 timing can ...

Page 24: ...mized DRAM controller and an A G P Interface The I O subsystem of the 440BX is based on the PIIX4E which is a highly integrated PCI ISA IDE Accelerator Bridge This chipset consists of the Intel 82443BX PCI A G P controller PZC and the Intel 82371EB PCI ISA IDE Xccelerator PIIX4E bridge chip Intel 82443BX PCI A G P Controller PAC The PAC provides bus control signals address paths and data paths for...

Page 25: ...ification Support for 3 3V A G P 66 133 devices Synchronous coupling to the host bus frequency PCI bus interface Complies with the PCI specification Asynchronous coupling to the host bus frequency PCI parity generation support Data streaming support from PCI to DRAM Support for five PCI bus masters in addition to the host and PCI to ISA I O bridge Support for concurrent host A G P and PCI transact...

Page 26: ... Xcelerator PIIX4E The PIIX4E is a multifunction PCI device implementing the PCI to ISA bridge PCI IDE functionality USB host hub functionality and enhanced power management The PIIX4E features Multifunction PCI to ISA bridge Support for the PCI bus at 33MHz Complies with the PCI specification Full ISA bus support USB controller Two USB ports Support for legacy keyboard and mouse Support for UHCI ...

Page 27: ...Sleep resume logic Real time Clock 256 byte battery backed CMOS SRAM Includes date alarm 16 bit counters timers based on 82C54 Accelerated Graphics Port A G P A G P is a high performance bus for graphics intensive applications such as 3D applications A G P while based on the PCI Local Bus Specification Rev 2 1 is independent of the PCI bus and is intended for exclusive use with graphical display d...

Page 28: ...mmands status and network data across PCI bus Integrated physical layer interface including 1 Complete functionality necessary for the 10Base T and 100Base TX network interfaces when in 10Mbit sec mode the interface drives the cable directly 2 A complete set of Media Independent Interface MII management registers for control and status reporting 3 802 3u Auto Negotiation for automatically establis...

Page 29: ...COM2 is a connector that with two 9 pin D type header is onboard serial ports of the CPU board PC 686 CPCI The following table shows the pin assignments of these connectors RS 422 RS 485 assigned for COM2 connector only CN2 PIN RS 232C RS 422 RS 485 1 DCD TX TX 2 RXD TX TX COM2 3 TSD RX RX 4 DTR RX RX 5 GND GND GND 6 DST RTS N C 7 RTS RTS N C 8 CTS CTS N C COM1 Pin 1 Pin 1 9 RI CTS N C Note For RS...

Page 30: ... beginning of the BIOS code and running the Power On Self Test POST Infrared Support On the front panel I O connector there are six pins that support Hewlett Packard HSDL 1000 compatible infrared IR transmitters and receivers In the Setup program Serial Port B can be directed to a connected IR device In this case the serial Port B connector cannot be used The IR connection can be used to transfer ...

Page 31: ...for parallel port operation Compatible Standard mode Bi Directional PS 2 compatible Bi Directional EPP A driver from the peripheral manufacturer is required for operation Bi Directional High speed ECP PIN No 1 2 3 4 5 6 7 8 9 10 11 12 13 Function STROBE PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 ACK BUSY PE SLCT PIN No 14 15 16 17 18 19 20 21 22 23 24 25 Function ALF ERROR INIT SLCT IN GND GND GND GND GND GN...

Page 32: ...CK Keyboard CN4 6 N C 2 8 USB Connector CN5 The Universal Serial Bus USB that allows plug and play computer peripherals such as keyboard mouse joystick scanner printer modem ISDN CD ROM and floppy disk drive to be automatically detected when they are attached physically without having to install drivers or reboot The USB connectors allow any of several USB devices to be attached to the computer Ty...

Page 33: ...ation Support for isochronous and asynchronous transfer types over the same set of wires Support for up to 127 physical devices Guaranteed bandwidth and low latencies appropriate for telephony audio and other applications Error handling and fault recovery mechanisms built into the protocol Note Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requireme...

Page 34: ... s Manual 2 9 VGA Connector CN6 It is a VGA CRT connector HD SUB15 Female The pin assignments are as follows PIN No Function PIN No Function 1 RED 9 N C 2 GREEN 10 GND 3 BLUE 11 D DATE 4 N C 12 N C 5 GND 13 H SYNC 6 GND 14 V SYNC 7 GND 15 D DCLK CN6 1 8 GND ...

Page 35: ...u use the LCD display series CONTEC products you need the LCD exchange display board for OEM PIN No Function PIN No Function 1 DP20 2 GND 3 DP16 4 VCC 5 DP21 6 DP0 7 DP17 8 DP8 9 DP22 10 DP1 11 DP18 12 DP9 13 DP23 14 DP2 15 DP19 16 DP10 17 VCC 18 DP3 19 FLM 20 DP11 21 MX 22 DP4 23 LP 24 DP12 25 SHFCLK 26 DP5 27 3 3V 28 DP13 29 3 3V 30 DP6 31 ENABLK 32 DP14 33 LCDVDD 34 DP7 35 ENVEE 36 DP15 37 GND ...

Page 36: ... Manual 2 11 CPU FAN Connector CN8 CN8 is a 3 pins box header for the CPU cooling fan power connector The fan must be a 12V fan Pin 3 is for Fan speed sensor input PIN No Function 1 GND 2 DC 12V CN8 1 2 3 3 FAN_Sensor Housing 5102 03 Molex Contact 5103 Molex ...

Page 37: ... MB 3 5 inch 2 88 MB 3 5 inch This connector supports the provided floppy drive ribbon cable After connecting the single and to the board connect the two plugs on the other end to the floppy drives PIN No Function PIN No Function 1 GND 2 RWC 3 GND 4 N C 5 GND 6 N C 7 GND 8 INDEX 9 GND 10 DS0 11 GND 12 DS1 13 GND 14 DS2 15 GND 16 MOT ON 17 GND 18 DIR 19 GND 20 STEP 21 GND 22 WD 23 GND 24 WG 25 GND ...

Page 38: ...ranslation modes The BIOS automatically detects the IDE device transfer rate and translation mode Programmed I O operations usually require a substantial amount of processor bandwidth However in multitasking operating systems the bandwidth freed by bus mastering IDE can be devoted to other tasks while disk transfers are occurring The CPU board PC 686 CPCI also supports laser servo LS 120 technolog...

Page 39: ...nfigured as the boot device the system will recognize it as both the A and B drive These connectors support the provided IDE hard disk ribbon cable After connecting the single end to the board connect the two plugs at the other end to your hard disk s If you install two hard disks you must configure the second drive to Slave mode by setting its jumper accordingly Please refer to your hard disk doc...

Page 40: ... AD62 GND AD55 GND AD48 GND AD41 GND AD34 GND BRSVP2B16 GND BRSVP2B18 GND GND GND GA3 C REQ1 SYSEN GNT3 C BE7 VIO AD61 VIO AD54 VIO AD47 VIO AD40 VIO AD33 FAL DEG PRST BRSVP2C18 N C N C N C GA40 D GNT1 GNT2 REQ4 GND C BE4 GND AD58 GND AD51 GND AD44 GND AD37 GND REQ5 GND REQ6 GND N C GND N C GA1 E REQ2 REQ3 GNT4 C BE6 PAR64 AD60 AD57 AD53 AD50 AD46 AD43 AD39 AD36 AD32 GNT5 BRSVP2E16 GNT6 BRSVP2E18 ...

Page 41: ...L GND AD17 N C N C N C FRAME GND SDONE GND AD15 GND AD9 GND AD4 VCC REQ64 C TRST TMS INTC VIO RST 3 3V AD28 VIO AD23 3 3V AD16 N C N C N C IRDY VIO SBO 3 3V AD14 VIO AD8 3 3V AD3 VIO ENUM D 12V TDO VCC INTP GND CLK GND AD25 GND AD20 GND N C N C N C GND STOP GND PAR GND AD11 M66EN AD6 VCC AD0 3 3V E VCC TDI INTD INTS GNT AD31 AD27 AD24 AD22 AD19 C BE2 N C N C N C TRDY LOCK PERR C BE1 AD13 AD10 C BE...

Page 42: ...DD10 SDD8 C WRATA WDATA DSA DS1 N C PDA2 PDDACK3 PDREQ PDD1 PDD3 PDD5 PDD7 SDA2 SDDACK SDREQ SDD1 SDD3 SDD5 SDD7 D WPRT STEP DSB RWC N C PDA0 PDIORDY PDD15 PDD13 PDD11 PDD9 PDRST SDA0 SDIORDY SDD15 SDD13 SDD11 SDD9 SDRST E N C N C N C N C N C IDEACT PDIAG N C N C N C N C IDE ACT N C SDIAG N C N C N C N C N C F GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND CN14 19 1 FE...

Page 43: ...ters using application software This connector is for optional wireless transmitting and receiving infrared module You must configure the setting through the BIOS setup to use the IR function 1 2 3 4 5 6 JP1 Pin No 1 2 3 4 5 6 Function IRTX GND IRRX N C 5V 3 3V 3 2 Watchdog Timer output selector JP2 When the watchdog timer activates setup involves two jumpers CPU processing has come to a halt it c...

Page 44: ... 9 11 13 15 17 19 21 23 JP5 2 4 6 8 10 1 3 5 7 9 RS 422 JP3 2 4 6 8 10 12 14 16 18 20 22 24 1 3 5 7 9 11 13 15 17 19 21 23 JP5 2 4 6 8 10 1 3 5 7 9 RS 485 JP3 2 4 6 8 10 12 14 16 18 20 22 24 1 3 5 7 9 11 13 15 17 19 21 23 JP5 2 4 6 8 10 1 3 5 7 9 1 For RS 485 TX pin 2 and RX pin 3 must jumper together inside the D type connector 2 TX pin 1 and RX pin 4 is the same ...

Page 45: ... the modem control register to control transmit data Modem control register Setting I O address 4H bit 1 0 RTS High Disables transmission 1 RTS low Enables transmission 3 3 2 Setting the RS 422 RS 485 receiver disable control jumper When the RS 422 RS 485 port is used the RTS signal is used for driver enable control Connecting JP1 Pins 4 and 6 disables the receiver at the same time preventing the ...

Page 46: ...r W Transmitter holding Register THR 0 R Receiver buffer Register RBR 02F8H 1 W Divisor latch Register LSB DLL 1 W Divisor latch Register MSB DLM 02F9H 0 W Interrupt enable Register IER 02FAH X R Interrupt ID Register IIR 02FBH X W Line control Register LCR 02FCH X W Modem Control Register MCR 02FDH X R Line status Register LSR 02FEH X R Modem Status Register MSR 02FFH X R W Scratch Register SCR ...

Page 47: ...ault JP4 1 2 3 4 5 6 7 8 CTS for RS 422 terminating resister provided JP4 1 2 3 4 5 6 7 8 RTS for RS 422 terminating resister provided JP4 1 2 3 4 5 6 7 8 RXD for RS 422 RS 485 terminating resister provided JP4 1 2 3 4 5 6 7 8 TXD for RS 422 RS 485 terminating resister provided 3 5 On board LAN selector JP6 JP6 Function JP6 1 2 Disabled JP6 1 2 Enabled Default ...

Page 48: ...iguration JP7 Function J P 7 1 2 3 4 0DC00 0DDFFh J P 7 1 2 3 4 0D800h 0D9FFh J P 7 1 2 3 4 0D400h 0D5FFh J P 7 1 2 3 4 0D000h 0D1FFh Default 3 7 Display Type Setting JP8 In case of connecting LCD with CN7 it is corresponding to OEM And generally please use on the no use LCD setting below JP8 1 2 8 7 3 8 CPU frequency ration setting JP9 This board will set the CPU frequency ration automatically De...

Page 49: ... battery powers the real time clock and CMOS memory When the computer is not plugged into a wall socket the battery has an estimated life of three years When the computer is plugged in the 3 3V standby current from the power supply extends the life of the battery The clock is accurate to 2 minutes month at 25ºC with 3 3V applied JP10 Function JP10 1 2 3 Normal Operation Default JP10 1 2 3 Clear CM...

Page 50: ...CHAPTER 3 Jumper Setting 42 PC 686 CPCI LV User s Manual ...

Page 51: ...64 1 byte Keyboard controller 0070 0071 2 bytes Real Time Clock Controller 0080 008F 16 bytes DMA page registers 00A0 00A1 2 bytes Interrupt controller 2 00B2 00B3 2 bytes APM control 00C0 00DE 31 bytes DMA controller 2 00F0 00FF 16 bytes Numeric processor 0170 0177 8 bytes Secondary IDE controller 01F0 01F7 8 bytes Primary IDE controller 0228 022F 8 bytes LPT3 0274 0277 4 bytes I O read data port...

Page 52: ... triggered PIC LPT n 400h 8 bytes ECP port LPT n base address 400h 0CF8 0CFF 4 bytes PCI configuration address register 0CF9 1 byte Turbo and reset control register Dword access only Byte access only 4 2 MEMORY MAP Address Range H Size Description 100000 18000000 512MB Extended memory E8000 FFFFF 96KB System BIOS E0000 E7FFF 32KB System BIOS Available as UMB C8000 DFFFF 96KB Available high DOS mem...

Page 53: ...bits Open 6 16bits Open 7 16bits Open 4 4 PCI Configuration Space Map Bus Device Function Description 00 00 00 Intel 82443BX PAC 00 01 00 Intel 82443BX PCI to PCI bridge for A G P 00 07 00 Intel 82371EB PIIX4E PCI ISA bridge 00 07 01 Intel 82371EB PIIX4E IDE bridge 00 07 02 Intel 82371EB PIIX4E USB 00 07 03 Intel 82371EB PIIX4E power management 00 0D 00 PCI expansion slot 1 00 0E 00 PCI expansion ...

Page 54: ...ave PIC 3 COM2 4 COM1 5 LPT2 Plug and Play option audio user available 6 Diskette drive controller 7 LPT1 8 Real time clock 9 ACPI 10 USB User available 11 User available 12 PS 2 mouse port if present else user available It need to set Disabled in BIOS 13 Reserved math coprocessor 14 Primary IDE if present else user available 15 Secondary IDE if present else user available Default but can be chang...

Page 55: ...rrupt grouping INTA By default all add in board that require only one interrupt are in this category For almost all board that require more than one interrupt the first interrupt on the board is also classified as INTA INTB Generally the second interrupt on add in board that require two or more interrupts is classified as INTB This is not an absolute requirement INTC and INTD Generally a third int...

Page 56: ...errupt sources Now however plug and add in board that has one interrupt Group INTA into the first PCI slot Plug a second add in board that has two interrupts Group INTA and INTB into the second PCI slot INTA in the first slot is connected to signal PIRQA INTA in the second slot is connected to signal PIRQB and INTB is connected to signal PIRC With no other boards added the three interrupt sources ...

Page 57: ... Installation Utility installs to the target system the INF files that outline to the operating system how the chipset components shall be configured This is needed for proper functionality of the following features of the Intel 440BX chipset Intel INF Installation Utility for Windows 95 and Windows 98 setup exe One of the following operating systems must be installed on the system Windows 95 4 00...

Page 58: ...h real time video acceleration Frame Based AGP Compatibility The 69000 graphics is designed to be used with either 33MHz PCI or with AGP as a frame based AGP device allowing it to be used with the AGP interface provided by the latest core logic chipsets HiQColor Technology The 69000 integrated CHIPS breakthrough HiQColor technology Based on the CHIPS proprietary TMED Temporal Modulated Energy Dist...

Page 59: ... capture and display systems on chip The capture system places data in display memory and the display system places the data in a window on the screen The capture system can receive data from either the system bus or from the ZV enabled video port in either RGB or YUV format The input data can also be scaled down before storage in display memory Capture of input data may also be double buffered fo...

Page 60: ...tem and to extend battery life Optimized for 3 3V operation the 69000 internal logic bus and panel interfaces operate at 3 3V but can tolerate 5V operation Software Compatibility Flexibility The HiQVideo controllers are fully compatible with the VGA standard at both the register and BIOS levels CHIPS and third party vendors supply a fully VGA compatible BIOS end user utilities and drivers for comm...

Page 61: ...ontroller with an integrated 10 100 Mbps for PCI board LAN designs 5 3 2 Specifications Advanced Configuration and Power Interface ACPI 1 20A based power management Wake on Magic Packet Wake on interesting packet Advanced System Management Bus SMB based manageability Wired for Management WFM 2 0 compliance IP checksum assist PCI 2 2 compliance PC 98 PC 99 and Server 99 compliance LAN Drivers Windo...

Page 62: ...ally to avoid abnormal operation PC 686 CPCI supports 16 levels watchdog timer by software programming I O ports Write any value to I O address 0441H will disable Watch Dog Timer Write setting code please reference to WDT Setting Table to I O 0443h will re load WDT Below is an assembly program example for disable and load of WDT MOV DX 0441H REM Write any value to 0441H disable WDT OUT DX AX MOV A...

Page 63: ... Copy system files and then click Start button Step 3 Copy the updated BIOS bin file and awdflash exe file to the System Disk Step 4 Put the System Disk in Drive A and re start your computer from Drive A Step 5 Begin to update your BIOS Enter awdflash command the Flash Memory Writer message will appear on screen Enter the updated BIOS file name at File Name to Program Enter the backup file name fo...

Page 64: ...d Temperature of this position sensor 2 sensor 1 BATTERY JP3 JP4 JP5 CN2 JP1 CN9 JP10 JP11 CN10 JP9 JP7 JP8 JP6 CN7 CN3 CN11 CN4 CN6 CN5 CN1 CN8 JP2 S1 Socket 370 CN13 CN12 CN14 DIMM2 DIMM1 DIMM3 SDD Socket BZ 5 6 2 Voltage You can read 3 3V 5V 5V 12V 12V VTT 1 5V Vcore of SBC VTT 1 5V CPU I O voltage Vcore CPU core voltage 5 6 3 Speed Sensor FAN Speed Sensor signal is input in CN8 pin3 when you u...

Page 65: ...p ID register inc dx in bx dx Read chip ID register to bx Hard Ware Monitor Register Index Address Auto Increment Address Description 20h 60h Vcore reading 21h 61h Vtt reading 22h 62h 3 3V reading 23h 63h 5V Reading 24h 64h 12V Reading 25h 65h 12V Reading 26h 66h 5V Reading 27h 67h Sensor Temperature reading 28h 68h CN18 FAN sensor reading 29h 69h Reserved 2Ah 6Ah Reserved 2Bh 3Dh 6Bh 7Dh Limit Re...

Page 66: ... Reserved BANK1 50h 51h Sensor 2 Temperature reading 52h 5Fh Sensor2 Temperature Configuration Register 1 BANK2 50h 5Fh Sensor3 Temperature Register not in use BANK3 50h 5Fh Reserved BANK4 50h 5Fh Reserved BANK5 50h 5Fh Reserved BANK6 50h 5Fh Reserved 1 Please refer to W83781D manual in detail ...

Page 67: ...reading Register 23h V5 V 16mV x ReadData x 1 68 12V reading Register 24h V 12 V 16mV x ReadData x 3 8 12V reading Register 25h V 12 V 16mV x ReadData 3 48 5V reading Register 26h V 5 V 16mV x ReadData 1 49 Temperature Sensor1 Temperature Register 27h Temperature Sensor1 Data Format Table Temperature Temperature Sensor Register 125o C 7Dh 25o C 19h 5o C 05h 1o C 01h 0o C 00h 1o C FFh 5o C FBh 25 o...

Page 68: ...in use Bit 5 4 FAN_Sensor1 Divisor Bit 1 0 Bit 3 0 VID 3 0 Input FAN Divisor Register BANK0 5Dh 7 6 5 4 3 2 1 0 Bit 7 FAN_Sensor3 Divisor Bit2 not in use Bit 6 FAN_Sensor2 Divisor Bit2 not in use Bit 5 FAN_Sensor1 Divisor Bit2 Bit 4 Reserved Bit 3 Sensor 3 type selection not in use Bit 2 Sensor 2 type selection not in use Bit 1 Sensor 1 type selection Set to 0 Bit 0 Battery Monitor Enable Disable ...

Page 69: ...1 3 4 0 0 0 1 0 1 95 1 0 0 1 0 3 3 0 0 0 1 1 1 90 1 0 0 1 1 3 2 0 0 1 0 0 1 85 1 0 1 0 0 3 1 0 0 1 0 1 1 80 1 0 1 0 1 3 0 0 0 1 1 0 1 0 1 1 0 2 9 0 0 1 1 1 1 0 1 1 1 2 8 0 1 0 0 0 1 1 0 0 0 2 7 0 1 0 0 1 1 1 0 0 1 2 6 0 1 0 1 0 1 1 0 1 0 2 5 0 1 0 1 1 1 1 0 1 1 2 4 0 1 1 0 0 1 1 1 0 0 2 3 0 1 1 0 1 1 1 1 0 1 2 2 0 1 1 1 0 1 1 1 1 0 2 1 0 1 1 1 1 1 1 1 1 1 50 5Fh Bank Select Register 4Eh 7 6 5 4 3 ...

Page 70: ... s Manual Chip ID Register BANK0 58h 7 6 5 4 3 2 1 0 CHIPID Bit 7 0 Winbond Chip ID number Read this register return 11h Temperature Sensor2 Temperature Register1 BANK1 50h 7 6 5 4 3 2 1 0 TEMP2 8 1 Please refer to temperature Sensor2 Data Format Table ...

Page 71: ... 7 6 5 4 3 2 1 0 Please refer to temperature Sensor2 Data Format Table Reserved Reserved Reserved Reserved Reserved Reserved Reserved TEMP 0 Temperature Sensor2 Data Format Table Temperature TEMP 8 1 TEMP 0 125o C 7Dh 0 25o C 19h 0 1o C 01h 0 0 5o C 00h 1 0o C 00h 0 0 5o C FFh 1 1o C FFh 0 25o C E7h 0 55o C C9h 0 ...

Page 72: ...CHAPTER 5 Software Utilities 64 PC 686 CPCI LV User s Manual ...

Page 73: ...guring it When it finishes the BIOS will seek an operating system on one of the disks and then launch and turn control over to the operating system While the BIOS is in control the Setup program can be activated in one of two ways 1 By pressing Del immediately after switching the system on or 2 By pressing the Del key when the following message appears briefly at the bottom of the screen during th...

Page 74: ...er level menu Move Enter Move to the item you desired PgUp key Increase the numeric value or make changes PgDn key Decrease the numeric value or make changes key Increase the numeric value or make changes key Decrease the numeric value or make changes Esc key Main Menu Quit and not save changes into CMOS Status Page Setup Menu and Option Page Setup Menu Exit current page and return to Main Menu F1...

Page 75: ...ice is to only alter settings which you thoroughly understand To this end we strongly recommend that you avoid making any changes to the chipset defaults These defaults have been carefully chosen by both Award and your systems manufacturer to provide the absolute maximum performance and reliability Even a seemingly small change to the chipset setup has the potential for causing you to use the over...

Page 76: ...and press Enter to accept and enter the sub menu Note that a brief description of each highlighted selection appears at the bottom of the screen Setup Items The main menu includes the following main setup categories Recall that some systems may not include all entries Standard CMOS Features Use this menu for basic system configuration See Section 6 3 for the details BIOS Features Setup Use this me...

Page 77: ...See section 6 8 for the details Load SETUP Defaults Use this menu to load the BIOS default values that are factory settings for optimal performance system operations While Award has designed the custom BIOS to maximize performance the factory has the right to change these defaults to meet their needs See section 6 8 for the details Integrated Peripherals Use this menu to specify your settings for ...

Page 78: ...e hh mm ss Set the system time IDE Primary Master Options are in its sub menu described in Table 64 Press Enter to enter the sub menu of detailed options IDE Primary Slave Options are in its sub menu described in Table 64 Press Enter to enter the sub menu of detailed options IDE Secondary Master Options are in its sub menu described in Table 64 Press Enter to enter the sub menu of detailed options...

Page 79: ...Enter to auto detect the HDD on this channel If detection is successful it fills the remaining fields on this menu IDE Primary Master None Auto Manual Selecting manual lets you set the remaining fields on this screen Selects the type of fixed disk User Type will let you select the number of cylinders heads etc Note PRECOMP 65535 means NONE Capacity Auto Display your disk drive size Disk drive capa...

Page 80: ...function is enabled and someone attempts to write data into this area BIOS will show a warning message on screen and alarm beep Enabled Activates automatically when the system boots up causing a warning message to appear when anything attempts to access the boot sector or hard disk partition table Disabled No warning message will appear when anything attempts to access the boot sector or hard disk...

Page 81: ...e items The Choice Floppy LS ZIP HDD SCSI CDROM Disabled Swap Floppy Drive If the system has two floppy drives you can swap the logical drive name assignments The choice Enabled Disabled Boot Up Floppy Seek Seeks disk drives during boot up Disabling speeds boot up The choice Enabled Disabled Boot Up NumLock Status Select power on state for NumLock The choice Enabled Disabled Gate A20 Option This e...

Page 82: ...er setup System The system will not boot and access to Setup will be denied if the correct password is not entered at the prompt Setup The system will boot but access to Setup will be denied if the correct password is not entered at the prompt Note To disable security select PASSWORD SETTING at Main Menu and then you will be asked to enter password Do not type anything and just press Enter it will...

Page 83: ...V User s Manual 75 OS Select For DRAM 64MB Select the operating system that is running with greater than 64MB of RAM on the system The choice Non OS2 OS2 Report No FDD For Win 95 Whether report no FDD for Win 95 or not The choice Yes No ...

Page 84: ...e altered The default settings have been chosen because they provide the best operating conditions for your system The only time you might consider making any changes would be if you discovered that data was being lost while using your system DRAM Settings The first chipset settings deal with CPU access to dynamic random access memory DRAM The default timings have been carefully chosen and should ...

Page 85: ...stem BIOS Cacheable Selecting Enabled allows caching of the system BIOS ROM at F0000h FFFFFh resulting in better system performance However if any program writes to this memory area a system error may result The choice Enabled Disabled Video BIOS Cacheable Select Enabled allows caching of the video BIOS resulting in better system performance However if any program writes to this memory area a syst...

Page 86: ...to determine the recovery time allowed for 16 bit I O Choices are from N A 1 to 4 CPU clocks Memory Hole At 15M 16M In order to improve performance certain space in memory can be reserved for ISA board This memory must be mapped into the memory space below 16MB The Choice Enabled Memory hole supported Disabled Memory hole not supported Passive Release When Enabled CPU to PCI bus accesses is allowe...

Page 87: ...tect DIMM PCI CLK This item allows you to enable disable auto detect DIMM PCI Clock The choice Enabled Disabled Spread Spectrum This item allows you to enable disable the spread spectrum modulate The choice Enabled Disabled CPU Warning Temperature This item allows you to enable disable the CPU warning temperature if your computer contains a monitoring system The choice Enabled Disabled Current Sys...

Page 88: ... configure you system to most effectively save energy while operating in a manner consistent with your own style of computer use Power Management This category allows you to select the type or degree of power saving and is directly related to the following modes 1 HDD Power Down 2 Doze Mode 3 Suspend Mode 4 Standby Mode ...

Page 89: ...nabled an Advanced Power Management device will be activated to enhance the Max Power Saving mode and stop the CPU internal clock If the Max Power Saving is not enabled this will be preset to No Video Off Method This determines the manner in which the monitor is blanked V H SYNC Blank This selection will cause the system to turn off the vertical and horizontal synchronization ports and writes blan...

Page 90: ...y the CPU clock will run at slower speed while all other devices still operate at full speed Standby Mode When enabled and after the set time of system inactivity the fixed disk drive and the video would be shut off while all other devices still operate at full speed Suspend Mode When enabled and after the set time of system inactivity all devices except the CPU will be shut off HDD Power Down Whe...

Page 91: ...bled Disabled Power On by Ring An input signal on the serial Ring Indicator RI line an incoming call on the modem awakens the system Wake Up On LAN This does not support Wake On LAN so it is impossible to change setting IRQ 8 Break Suspend You can enabled or disable monitoring of IRQ8 so it does not awaken the system from Suspend mode The choice Enabled Disabled ...

Page 92: ... s Manual Reload Global Timer Event When enabled an event occurring on each device listed below restarts the global time for Standby mode IRQ 3 7 9 15 NMI Primary IDE 0 Primary IDE 1 Secondary IDE 0 Secondary IDE 1 FDD COM LPT Port PCI PIRQ A D ...

Page 93: ...rs some very technical items and it is strongly recommended that only experienced users should make any changes to the default settings PNP OS Installed Select Yes if the system operating environment is Plug and Play aware e g Windows 95 The choice Yes No Resource Controlled by The Award Plug and Play BIOS can automatically configure all the boot and Plug and Play compatible devices If you select ...

Page 94: ...and Play standard whether designed for PCI or ISA bus architecture The Choice Legacy ISA and PCI ISA PnP DMA n Assigned to When resources are controlled manually assign each system DMA channel as one of the following types depending on the type of device using the interrupt Legacy ISA for devices compliant with the original PC AT bus specification PCI ISA PnP for devices compliant with the Plug an...

Page 95: ... in the chipset has two channels it requires two interrupt services The primary and secondary IDE INT fields default to values appropriate for two PCI IDE channels with the primary PCI IDE channel having a lower interrupt than the secondary Used MEM base addr Select a base address for the memory area used by any peripheral that requires high memory The Choice C800 CC00 D000 D400 D800 DC00 N A Used...

Page 96: ...a confirmation dialog box with a message similar to Load BIOS Defaults Y N N Pressing Y loads the BIOS default values for the most stable minimal performance system operations Load SETUP Defaults When you press Enter on this item you get a confirmation dialog box with a message similar to Load SETUP Defaults Y N N Pressing Y loads the default values that are factory settings for optimal performanc...

Page 97: ...ces that the onboard IDE interface supports Modes 0 through 4 provide successively increased performance In Auto mode the system automatically determines the best mode for each device The choice Auto Mode 0 Mode 1 Mode 2 Mode 3 Mode 4 IDE Primary Secondary Master Slave UDMA Ultra DMA 33 implementation is possible only if your IDE hard drive supports it and the operating environment includes a DMA ...

Page 98: ... Init Display First It is impossible to change the setting Onboard FDC Controller Select Enabled if your system has a floppy disk controller FDC installed on the system board and you wish to use it If you install and in FDC or the system has no floppy drive select Disabled in this field The choice Enabled Disabled Onboard Serial Port 1 Port 2 Select an address and corresponding interrupt for the f...

Page 99: ...i Hi Lo Lo Lo Hi Hi Lo Onboard Parallel Port Select a logical LPT port name and matching address for the physical parallel printer port The Choice 378H IRQ7 278H IRQ5 3BCH IRQ7 Disabled Parallel Port Mode Selected an operating mode for the onboard parallel port Select Compatible or extended unless you are certain both your hardware and software support EPP or ECP mode The Choice SOOM ECO EPP1 7 EP...

Page 100: ...ord just press Enter when you are prompted to enter the password A message will confirm the password will be disabled Once the password is disabled the system will boot and you can enter Setup freely PASSWORD DISABLED When a password has been enabled you will be prompted to enter it every time you try to enter Setup This prevents an unauthorized person from changing any part of your system configu...

Page 101: ...s on after you turn your system off The next time you boot your computer the BIOS configures your system according to the Setup selections stored in CMOS After saving the values the system is restarted again Exit Without Saving Pressing Enter on this item asks for confirmation Quit without saving Y N Y This allows you to exit Setup without storing in CMOS any change The previous selections remain ...

Page 102: ...accompanied by PRESS F1 TO CONTINUE CTRL ALT ESC OR DEL TO ENTER SETUP 6 13 POST Beep Currently there are two kinds of beep codes in BIOS This code indicates that a video error has occurred and the BIOS cannot initialize the video screen to display any additional information This beep code consists of a single long beep followed by two short beeps The other code indicates that your DRAM error has ...

Page 103: ...tected or the drive does not contain proper system boot files Insert a system disk into Drive A and press Enter If you assumed the system would boot from the hard drive make sure the controller is inserted correctly and all cables are properly attached Also be sure the disk is formatted as a boot device Then reboot the system Diskette drives or types mismatch error RUN SETUP Type of diskette drive...

Page 104: ... incomplete Note When either of these errors appear the system will boot in ISA mode which allows you to run the EISA Configuration Utility Error encountered initializing hard drive Hard drive cannot be initialized Be sure the adapter is installed correctly and all cables are correctly and firmly attached Also be sure the correct hard drive type is selected in Setup Error initializing hard disk co...

Page 105: ...T ON ALL BUT KEYBOARD This will cause the BIOS to ignore the missing keyboard and continue the boot Memory address error at Indicates a memory address error at a specific location You can use this location along with the memory map for your system to find and replace the bad memory chips Memory parity error at Indicates a memory parity error at a specific location You can use this location along w...

Page 106: ...om screen when an error occurs that requires you to reboot Press any key and the system will reboot Press F1 to disable NMI F2 to REBOOT When BIOS detects a Non maskable Interrupt condition during boot this will allow you to disable the NMI and continue to boot or you can reboot the system with the NMI enabled RAM parity error CHECKING FOR SEGMENT Indicates a parity error in Random Access Memory S...

Page 107: ...he system will boot in ISA mode which allows you to run the EISA Configuration Utility System halted CTRL ALT DEL to REBOOT Indicates the present boot attempt has been aborted and the system must be rebooted Press and hold down the CTRL and ALT keys and press DEL Wrong board in slot PLEASE RUN EISA CONFIGURATION UTILITY The board ID does not match the ID stored in the EISA non volatile memory NOTE...

Page 108: ...r is pulled low Keyboard error or no keyboard present Cannot initialize the keyboard Make sure the keyboard is attached correctly and no keys are being pressed during the boot Manufacturing POST loop System will repeat POST procedure infinitely while the P15 of keyboard controller is pull low This is also used for M B burn in test BIOS ROM checksum error System halted The checksum of ROM address F...

Page 109: ...o copy BIOS back to E000 F000 shadow RAM 0h1 Expand the Xgroup codes locating in physical address 1000 0 02h Reserved 03h Initial Superio_Early_Init switch 04h Reserved 05h 1 Blank out screen 2 Clear CMOS error flag 06h Reserved 07h 1 Clear 8042 interface 2 Initialize 8042 self test 08h 1 Test special keyboard controller for Winbond 977 series Super I O chips 2 Enable keyboard interface 09h Reserv...

Page 110: ...then check for override 13h Reserved 14h Program chipset default values into chipset Chipset default values are MODBINable by OEM customers 15h Reserved 16h Initial Early_Init_Onboard_Generator switch 17h Reserved 18h Detect CPU information including brand SMI type Cyrix or Intel and CPU level 586 or 686 19h Reserved 1Ah Reserved 1Bh Initial interrupts vector table If no special specified all H W ...

Page 111: ...ts 5 Early PCI initialization Enumerate PCI bus number Assign memory I O resource Search for a valid VGA device VGA BIOS and put it into C000 0 24h Reserved 25h Reserved 26h Reserved 27h Initialize INT 09 buffer 28h Reserved 29h 1 Program CPU internal MTRR P6 PII for 0 640K memory address 2 Initialize the APIC for Pentium class CPU 3 Program early chipset according to CMOS setup Example onboard ID...

Page 112: ... 3Ch Test 8254 3Dh Reserved 3Eh Test 8259 interrupt mask bits for channel 1 3Fh Reserved 40h Test 8259 interrupt mask bits for channel 2 41h Reserved 42h Reserved 43h Test 8259 functionality 44h Reserved 45h Reserved 46h Reserved 47h Initialize EISA slot 48h Reserved 49h 1 Calculate total memory by testing the last double word of each 64K page 2 Program writes allocation for AMD K5 CPU 4Ah Reserve...

Page 113: ...xtended memory to 0 53h Reserved 54h Reserved 55h Display number of processors multi processor platform 56h Reserved 57h 1 Display PnP logo 2 Early ISA PnP initialization Assign CSN to every ISA PnP device 58h Reserved 59h Initialize the combined Trend Anti Virus code 5Ah Reserved 5Bh Optional Feature Show message for entering AWDFLASH EXE from FDD optional 5Ch Reserved 5Dh 1 Initialize Init_Onboa...

Page 114: ...Dh 1 Assign resources to all ISA PnP devices 2 Auto assign ports to onboard COM ports if the corresponding item in Setup is set to AUTO 6Eh Reserved 6Fh 1 Initialize floppy controller 2 Set up floppy related fields in 40 hardware 70h Reserved 71h Reserved 72h Reserved 73h Optional Feature Enter AWDFLASH EXE if AWDFLASH is found in floppy drive ALT F2 is pressed 74h Reserved 75h Detect install all ...

Page 115: ...nt hook 2 Recover the text fond used by EPA logo not for full screen logo 3 If password is set ask for password 83h Save all data in stack back to CMOS 84h Initialize ISA PnP boot devices 85h 1 USB final Initialization 2 NET PC Build SYSID structure 3 Switch screen back to text mode 4 Set up ACPI table at top of memory 5 Invoke ISA adapter ROMs 6 Assign IRQs to PCI devices 7 Initialize APM 8 Clear...

Page 116: ...anagement final initialization 5 Clear screen display summary table 6 Program K6 write allocation 7 Program P6 class write combining 95h 1 Program daylight saving 2 Update keyboard LED typematic rate 96h 1 Build MP table 2 Build update ESCD 3 Set CMOS century to 20h or 19h 4 Load CMOS time into DOS timer tick 5 Build MSIRQ routing table FFh Boot attempt INT 19h ...

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