4. Using the I/O Address Map
ADI16-4(FIT)GY
45
outp( ADR+0x18, 0xb );
/* Factory Setting(Gain) */
outp( ADR+0x1c, 0x20 );
while( inp( ADR+0x17 ) & 0x4 );
GainData = (unsigned char)inp( ADR+0x1c );
outp( ADR+0x18, 0xa );
/* set Gain Data*/
outp( ADR+0x1c, 0x0 );
outp( ADR+0x1d, GainData );
while( inp( ADR+0x17 ) & 0x8 );
outp( ADR+0x18, 0xb );
/* Factory Setting(Offset)
*/
outp( ADR+0x1c, 0x21 );
while( inp( ADR+0x17 ) & 0x4 );
OffsetData = (unsigned char)inp( ADR+0x1c );
outp( ADR+0x18, 0xa );
/* set Offset
Data*/
outp( ADR+0x1c, 0x1 );
outp( ADR+0x1d, OffsetData );
while( inp( ADR+0x17 ) & 0x8 );
outp( ADR+0x18, 0x04 );
/* Timer Data */
outp( ADR+0x1c, 0xff );
/* 250ns x 4,000,000 */
outp( ADR+0x1d, 0x08 );
outp( ADR+0x1e, 0x3d );
outp( ADR+0x1f, 0x00 );
outp( ADR+0x18, 0x01 );
/* Interrupt Factor */
outp( ADR+0x1c, 0xef );
/* Sampling Clock Input Mask OFF */
}
/* ----- change vector ------------------------------------------------------
- */
void ChgVect( void )
{
OrgVect = _dos_getvect( IntVector[IrqLevel] );
_disable();
_dos_setvect( IntVector[IrqLevel], inthandler );
if ( IrqLevel > IRQ7 ) {
/* IMR and mask clear */
outp( 0x21, ( OrgMasterImr = inp( 0x21 ) ) & 0xfb );
outp( 0xa1, ( OrgSlaveImr = inp( 0xa1 ) ) & PicMask[IrqLevel] );
outp( 0x20, 0x62 );
/* ISR clear (master) */
outp( 0xa0, IsrClear[IrqLevel] );
/* ISR clear (slave) */
} else {
/* IMR and mask clear */
outp( 0x21, ( OrgMasterImr = inp( 0x21 ) ) & PicMask[IrqLevel] );
outp( 0x20, IsrClear[IrqLevel] );
/* ISR clear */
}
_enable();
/* enable */
}
/* ----- restore vector -----------------------------------------------------
- */
void ResVect( void )
{
_disable();
/* disable */
if ( IrqLevel > IRQ7 ) {
/* restore IMR */
outp( 0x21, OrgMasterImr );
outp( 0xa1, OrgSlaveImr );
} else
outp( 0x21, OrgMasterImr );
_dos_setvect( IntVector[IrqLevel], OrgVect );
/* restore orgvect */
_enable();
/* enable */
}
/* ----- interrupt handler --------------------------------------------------
- */
void _interrupt _far inthandler( void )
