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2013
congatec
AG
QMX6m03
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9
Interface - Signal Descriptions and Pinout Tables
The following section describes the signals found on Qseven
®
module’s edge fingers and the interfaces implemented on the conga-QMX6.
Table 3 describes the terminology used in this section for the Signal Description tables. The PU/PD column indicates if a Qseven
®
module pull-
up or pull-down resistor has been used, if the field entry area in this column for the signal is empty, then no pull-up or pull-down resistor has
been implemented by congatec. The “#” symbol at the end of the signal name indicates that the active or asserted state occurs when the signal
is at a low voltage level. When “#” is not present, the signal is asserted when at a high voltage level.
Note
The Signal Description tables do not list internal pull-ups or pull-downs implemented by the chip vendors, only pull-ups or pull-downs implemented
by congatec are listed. For information about the internal pull-ups or pull-downs implemented by the chip vendors, refer to the respective chip’s
datasheet.
Not all the signals described in this section are available on all conga-QMX6 variants. Use the article number of the module and refer to the
options table on page 8 to determine the options available on the module.
Table 4 Signal Tables Terminology Descriptions
Term
Description
I
Input Pin
O
Output Pin
OC
Open Collector
OD
Open Drain
PP
Push Pull
I/O
Bi-directional Input/Output Pin
3.3VSB
3.3V tolerant active in standby state
P
Power Input
NA
Not applicable
NC
Not Connected
PCIE
PCI Express differential pair signals. In compliance with the PCI Express Base Specification 1.0a.
GB_LAN
Gigabit Ethernet Media Dependent Interface differential pair signals. In compliance with IEEE 802.3ab 1000Base-T Gigabit Ethernet Specification.
USB
Universal Serial Bus differential pair signals. In compliance with the Universal Serial Bus Specification 2.0
SATA
Serial Advanced Technology Attachment differential pair signals. In compliance with the Serial ATA High Speed Serialized AT Attachment Specification 1.0a.
SPI
Serial Peripheral Interface bus is a synchronous serial data link that operates in full duplex mode.
CAN
Controller Area Network bus is a vehicle bus standard that allows microcontrollers and devices to communicate with each other within a vehicle without a host
computer.
LVDS
Low-Voltage Differential Signaling differential pair signals. In compliance with the LVDS Owner's Manual 4.0.
TMDS
Transition Minimized Differential Signaling differential pair signals. In compliance with the Digital Visual Interface (DVI) Specification 1.0.
CMOS
Logic input or output.
