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© Tieline Research Pty. Ltd. 2021
Gateway and Gateway 4 Manual v1.2
Digital Output Type
The codec supports configuration of all outputs as digital AES3, or digital AoIP outputs.
1. Press the
SETTINGS
button.
2. Navigate to
Audio Options
and press the
button.
3. Select
Dig. Output Type
.
AES3 Out Clock Source
The codec contains two sample rate converters.
Input Sample Rate Converter
The codec implements an Asynchronous Sample Rate Converter (ASRC) to convert the sample
rate of an AES3 input to the sample rate set in the codec. The codec sample rate is determined
by the selected algorithm. For example, if you select the Music algorithm, the sample rate will
be set to 32kHz. By default the codec will up-sample all AES3 input sources to 96kHz sampling
and then convert to match the AES output sample rate setting.
Important Note:
All AES3 inputs must have the same sample-rates and must be
synchronized to a common clock. See
for pin-outs of AES3 inputs.
Output Sample Rate Converter
The sample rate of the AES3 output is configured using the clock source setting via the
SETTINGS
button and then
Audio Options > AES3 Out Clock Src
. This configures the
sample rate frequency of all AES3 output signals.
Wordclock Sync In
This setting configures the codec for a word clock source via the
SYNC I/O 2
BNC connector on
the codec rear panel (this is the same as the
External Word Clock
setting in Tieline G3
codecs). Often this will be a studio reference signal. In television broadcasting facilities the
audio reference signal should be locked to the video reference if there is one available. The
sample rate being received is recognized by the codec and automatically adjusted. Supported
sample rates include 32 kHz, 44.1 kHz, 48 kHz and 96 kHz. Note: The reference clock must be
/- 50ppm of the listed sample rates.
Lock to AES3 Input
With this setting the codec uses AES3 input sync information to set the codec output sample
rate (Note: this is the same as the AES Rx Clock setting in Tieline G3 codecs). The codec
initially tries to use the signal on AES inputs 1 and 2 as the clock to which the AES outputs are
synchronized. If unavailable, it then attempt to use inputs 3 and 4, or inputs 5 and 6 and so on
in that order. If you select this option, all AES inputs must always be synchronized to the same
clock source, e.g. if AES3 inputs 1 and 2 use 48kHz sampling then all other inputs must also
be synchronized to the same clock. Supported sample rates include 32 kHz, 44.1 kHz, 48 kHz
and 96 kHz. Note: The reference clock must be /- 50ppm of the listed sample rates.
Summary of Contents for Tieline Gateway
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Page 34: ...34 Gateway and Gateway 4 Manual v1 2 Tieline Research Pty Ltd 2021 Settings Menu Navigation...
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