Chassis Plans ATXP-875P, Technical Reference

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ATXP-875P Technical Reference Appendix C: Communication Devices
Chassis Plans 70
Appendix C On-Board Industrial Devices
The ATXP-875P offers On-board two (optional second one) 10/100/1000 Ethernet controllers (First one optional
10/100/1000) and four serial ports (two RS-422/485 optional). The ATXP-875P also offers a Post Code display that
will help you on troubleshooting.
Post Code Display
The POST code display is a device implemented on the ATXP-875P to help on failure diagnostics. A POST code is
transmitted by the BIOS during the POST (Power On Self Test). It is a number that refers to the state or test
condition of a circuit or group of circuits. Knowing the results of these tests (hence the POST code) can be very
important in debugging a system.
POST Checkpoint Codes
When AMIBIOS performs the Power On Self Test, it writes diagnostic codes checkpoint codes to I/O port 0080h
where the POST code display is connected. Please, refer to Appendix B for POST codes description.
Watchdog Timer
The Watchdog Timer (WDT) supports the following features and functions:
•
Selectable prescaler – approximately 1 MHz and approximately 1 KHz
•
33 MHz clock (30 ns clock ticks)
•
Multiple modes: WDT and free-running
o
Free-running mode:
ƒ
One stage timer.
ƒ
Toggles WDT_OUT# after programmable time.
o
WDT Mode:
ƒ
Two stage timer:
•
First stage generates IRQ and SMI interrupt after programmable time.
•
Second stage drives WDT_OUT# low or inverts the previous value.
o Used only after first timeout occurs.
o
Status bit preserved in RTC well for possible error detection and
correction.
o
*Drives WDT_TOUT# when OUTPUT is enabled.
•
Timer may be disabled (default state) or locked (hard reset required to disable WDT)
•
WDT automatic reload of preload value when WDT reload sequence is performed