Using the QuickUSB Library
Addr Name
Description
Values
1
SETTING_WORDWIDE
High-speed port data width MSB=Unused, Reserved for future
use.
LSB - Bit definitions:
Bit 7-1: Reserved
Bit 0: WORDWIDE – HSPP data
width
0 = 8 bits
1 = 16 bits
2
SETTING_DATAADDRESS
Data bus starting address
and flags to enable and
disable 1) the address bus
and 2) the feature that auto
increments the bus
address after each data
transaction.
Bit 15:
0=Increment address bus
1=Don’t increment address bus
Bit 14:
0=enable address bus
1=disable address bus (port
C[7:0] and E[7] may be used as
general purpose I/O)
Bit 13-9: Unused
Bits 8-0:
HSPP address value
3
SETTING_FIFO_CONFIG
Sets the FIFO
configuration. Controls the
FX2 IFCONFIG register.
MSB=FIFOINPOLAR –Slave FIFO
Interface Pins Polarity Bit
Definitions:
Bit 15-14: Unused R/O = 0
Bit 13: PKTEND – FIFO Packet
End Polarity
0 = Active Low
1 = Active High
Bit 12: SLOE – FIFO Output Enable
Polarity
0 = Active Low
1 = Active High
Bit 11: SLRD – FIFO Read Polarity
0 = Active Low
1 = Active High
Bit 10: SLWR – FIFO Write Polarity
0 = Active Low
1 = Active High
Bit 9: EF – FIFO Empty Flag
Polarity
0 = Active Low
1 = Active High
Bit 8: FF – FIFO Full Flag Polarity
0 = Active Low
1 = Active High
LSB=IFCONFIG – Interface
Configuration Bit definitions:
Bit 7: IFCLKSRC – IFCLK source
select
0=External
clock
1=Internal clock
Bit 6: 3048MHZ – IFCLK speed
select
0=30Mhz
1=48MHz
Bit 5: IFCLKOE – IFCLK output
enable
0=Tri-state the IFCLK pin
1=Drive the IFCLK pin
Bit 4: IFCLKPOL – IFCLK polarity
select
46
QuickUSB Settings
