Designing Hardware for QuickUSB
FX2128
Pin
QUSB2
Pin
Name
Dir
Desc
Function
70
24
CTL1 / REN
/ FLAGB /
nFULL
Output GPIF
Control
Output 1
Multifunction Pin whose function is
selected by
SETTING_FIFO_CONFIG[1:0]:
CTL1 (default) is a GPIF output
signal whose function (REN) is
waveform specific. Enabled when
SETTING_FIFO_CONFIG[1:0] = '10'.
REN is the active high Read Enable
output signal for the GPIF.
Implemented in the Simple, FIFO
Handshake, Full Handshake, and
Block Handshake I/O Models.
Enabled when
SETTING_FIFO_CONFIG[1:0] = '10'.
FLAGB / nFULL is the Slave FIFO
Full Flag. Gives Full status of the
FIFO selected by FIFOADR[1:0] in
slave mode. Output only, active low.
Enabled when
SETTING_FIFO_CONFIG[1:0] = '11'
71 26 CTL2
/
WEN /
FLAGC /
nEMPTY
Output GPIF
Control
Output 2
Multifunction Pin whose function is
selected by
SETTING_FIFO_CONFIG[1:0]:
CTL2 (default) is a GPIF output signal
whose function (WEN) is waveform
specific. Enabled when
SETTING_FIFO_CONFIG[1:0] = '10'.
WEN is the active high Write Enable
output signal for the GPIF.
Implemented in the Simple, FIFO
Handshake, Full Handshake, and
Block Handshake I/O Models.
Enabled when
SETTING_FIFO_CONFIG[1:0] = '10'.
FLAGC / nEMPTY is the Slave FIFO
Empty Flag. Gives Empty status of
the FIFO selected by FIFOADR[1:0]
in slave mode. Output only, active
low. Enabled when
SETTING_FIFO_CONFIG[1:0] = '11'
66 28 CTL3
/
nREN
Output GPIF
Control
Output 3
CTL3 is a GPIF output signal whose
function (nREN) is waveform specific.
Enabled when
SETTING_FIFO_CONFIG[1:0] = '10'.
nREN is the active low Read Enable
output signal for the GPIF.
Implemented in the Simple, FIFO
Handshake, Full Handshake, and
Block Handshake I/O Models.
Enabled when
SETTING_FIFO_CONFIG[1:0] = '10'.
QuickUSB Pin Definitions
33
