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3 Zynq Ult MPSoC I/O Bank Allocation
3.1 PS MIO Bank Allocation
There are 78 I/O available in the PS MIO Banks. The tables below lists the number of required I/O per
peripheral and the MIO locations where the interface exists.
Table 35
– PS MIO Bank Interface Requirements
Interface
I/O Required
MIO
QSPI FLASH
12
0-5, 7-12
USB
12
52-63
ETHERNET
14
64-77
eMMC
10
13-22
I2C
2
24-25
TOTAL
50
The General Purpose I/
O assignments aren’t specifically defined interfaces such as those that are defined
in Table 32. The table below provides the MIO locations of the PS MIO general purpose pins and also MIO
pins that support other functions.
Table 36
– PS MIO General Purpose I/O Peripheral Options
Interface
I/O Required
MIO
QSPI FB CLK
1
6
MIO23_INT_N
1
23
General Purpose PS MIO
26
26-77
TOTAL
28
The end-user is encouraged to utilize the Zynq Ult MPSoC TRM in defining the MIO peripheral
mappings that they would like to utilize on a custom UltraZed Carrier Card.
