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MSC C10M-BT / MSC C10M-BTC

User Manual

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Feature

Options

Description

Hardware Prefetcher

Enabled
Disabled

To turn on/off the Mid Level Cache
(L2) streamer prefetcher.

Adjacent Cache Line
Prefetch

Enabled
Disabled

To turn on/off prefetching of adjacent
cache lines.

Power Technology

Energy Efficient
Disabled
Custom

Enable the power management
features.

P-STATE Coordination

HW_ALL
SW_ALL
SW_ANY

Change P-STATE Coordination type

CPU C6 report

Enabled
Disabled

Enable/Disable CPU C6(ACPI C3)
report to OS

Package C State limit

C0
C1
C3
C6
C7
No Limit

Package C State limit

6.7.7

PPM Configuration

Feature

Options

Description

EIST

Enabled
Disabled

Enable or disable Intel

Speedstep

For more information see also
technotes in Chapter 8.

CPU C state report

Enabled
Disabled

Enable/Disable CPU C state report to
OS

Summary of Contents for COM Express MSC C10M-BT

Page 1: ...COM ExpressTM Mini Module MSC C10M BT MSC C10M BTC Type 10 Pin out Intel AtomTM Series SOC Rev 1 0 2021 03 08 User Manual ...

Page 2: ...ccordance with the instruction manual this product may cause radio interference in which case the user may be required to take adequate measures at his or her owns expense Trademarks All used product names logos or trademarks are property of their respective owners Certification MSC Technologies GmbH is certified according to DIN EN ISO 9001 2015 standards Life Cycle Management MSC products are de...

Page 3: ...6 Mechanical Dimensions 17 2 9 1 Compact module 17 Thermal Specifications 18 2 10 1 Operating Temperature Range 18 Use Conditions 19 Signal description 19 2 12 1 High Definition Audio 19 2 12 2 Ethernet 20 2 12 3 Serial ATA 20 2 12 4 PCI Express Lanes 21 2 12 5 Express Card Support 21 2 12 6 USB 22 2 12 7 LPC Bus 23 2 12 8 LVDS eDP 23 2 12 9 Digital Display Interfaces 25 2 12 10 Miscellaneous 26 2...

Page 4: ...7 7 PPM Configuration 51 6 7 8 IDE Configuration 52 6 7 9 Internal Devices Configuration 52 6 7 10 AMI Graphic Output Policy 53 6 7 11 Network stack Configuration 53 6 7 12 CSM Configuration 54 6 7 13 NVMe 55 6 7 14 SDIO Configuration 55 6 7 15 USB Configuration 55 6 7 16 Security Configuration 56 6 7 17 SIO WB627 Configuration 58 6 7 18 EC Hardware Monitoring 59 6 7 19 Legacy IRQ Reservation 62 6...

Page 5: ...ind Restoration of Bios default settings no display available 76 Bios Recovery 77 Bios Recovery for BIOS version older than V1 50 77 Clear CMOS and Recovery Jumper 78 Post Codes 78 Technotes 79 EAPI 82 BIOS Configurator Tool 83 Troubleshooting 84 ...

Page 6: ...MSC C10M BT MSC C10M BTC User Manual 6 90 General Information Revision History Rev Date Description 1 0 2021 03 08 First Release ...

Page 7: ...erial ATA Specification Serial ATA 1 0 gold pdf Last update August 29th 2002 Rev 1 0 http www sata io org 4 IEEE Std 802 3 2002 802 3 2002 pdf http www ieee org 5 VESA Embedded DisplayPort Standard eDP_v1_3 mem pdf Last update 13 01 2012 http www vesa org 6 Universal Bus Specification usb_20 pdf Last update April 27th 2000 http www usb org 7 Universal Serial Bus Revision 3 0 Specification usb_30_s...

Page 8: ...wer efficiency For evaluation and design in of the COM Express modules MSC offers evaluation baseboards and development motherboards providing the interface infrastructure for the COM Express module using PC type connectors for external access Currently four module sizes are defined in the COM Express Specification 2 1 the Mini Module the Compact Module the Basic Module and the Extended Module The...

Page 9: ...rable as HDMI DVI or Display Port o Single channel 24 bit LVDS shared with eDP High definition digital audio interface external CODEC Single Gbit Ethernet interface Intel Ethernet Controller I210 AT LPC interface Two serial ports BIOS support for Super IO Winbond 83627 on carrier board via LPC interface Four GPI pins Four GPO pins 12V primary power supply input Wide input range 4 75V 20 0V 5V stan...

Page 10: ...MSC C10M BT MSC C10M BTC User Manual 10 90 Block diagram ...

Page 11: ...MSC C10M BT MSC C10M BTC User Manual 11 90 ...

Page 12: ...2 SATA 3 0 Gbit s A B HDA Digital Interface 0 1 1 1 A B USB 2 0 Ports 4 8 4 8 4 8 USB 2 0 ports at MSC C10M BT are only available with HSIC Hub option A B USB Client 0 1 0 1 A B USB 3 0 Ports 0 2 1 1 A B LAN Port 0 1 1 1 1 Intel Ethernet Controller I210 AT A B Express Card Support 1 2 2 2 A B LPC Bus 1 1 1 1 A B SPI 1 2 1 1 An external SPI BIOS Flash is not supported System Management A B SDIO mux...

Page 13: ...MSC C10M BT MSC C10M BTC User Manual 13 90 A B Trusted Platform Modules 0 1 1 1 optional TPM 1 2 module ...

Page 14: ...ss Type 10 interface fully compliant to COM Express Base Specification R2 1 PCI Express Three channels PCIe x1 LPC Low Pin Count Bus for heritage interfaces SPI Serial Peripheral Interface for one SPI flash device Graphics Controller Integrated Intel HD Graphics LVDS Single channel 24 bit LVDS shared with eDP Digital Display Ports Two Digital Display Interface DDI one is shared with LVDS DP up to ...

Page 15: ...which refer to consumption of the module itself without consumption of the base board and CPU fan The following applications have been tested 1 DOS prompt 2 Windows desktop idle under Microsoft Windows 7 Professional 64 bit SP1 3 Running test tool to achieve 100 CPU workload on each processor core thread and Graphics workload under Microsoft Windows 7 Professional 64 bit SP1 Module CPU DOS Win 7 I...

Page 16: ...W 0 27 W 0 31 W 12V only 0 47 W 0 50 W 0 32 W 0 36 W System Memory The MSC C10M BT CPU module provides on board memory which have to meet the following demands unbuffered non ECC DDR3L 1 35V Supply Voltage DDR3L 1067 PC3 8500 DDR3L 1333 PC3 10600 SPD Serial Presence Detect EEPROM At temperatures above 60 C the memory refresh rate must be doubled with BIOS option DDR double Refresh Rate set to Enab...

Page 17: ...5 C MLC 16 GByte Micron MTFC16GAKAECN 4M IT Micron MTFC16GAKAEJP 4M IT Industrial 40 C to 85 C MLC 32 GByte Micron MTFC32GJDED 4M IT SanDisk SDINBDG4 32G XI1 Industrial 40 C to 85 C MLC 64 GByte SanDisk SDIN8CE4 64G XI Note With Windows 7 eMMC is not supported Mechanical Dimensions 2 9 1 Compact module There are two height options defined in the COM Express specification 5mm and 8mm The height opt...

Page 18: ...he heat spreader should not exceed 80 C Main issue for the thermal functionality of a system is that each device of the module is operated within its specified thermal values The max value for the SOC is listed in chapter 2 4 So there may be system implementations where the heat spreader temperature could be higher Anyway in this case it has to be validated that there are no thermal specification ...

Page 19: ...void loading signals that are active during suspend to avoid excessive suspend mode current draw I Input O Output OD Open Drain output I OD Bi directional Input Open Drain Output Pin I O Bi directional Input Output ePU external pull up resistor on COM Express module ePD external pull down resistor on COM Express module eSR external series resistor on COM Express module iPU integrated pull up resis...

Page 20: ... 0 link indicator active low Intel I210 AT GBE0_LINK100 OD CMOS 3 3V Sus 5V 20 mA Gigabit Ethernet Controller 0 100 Mbit sec link indicator active low Intel I210 AT GBE0_LINK1000 OD CMOS 3 3V Sus 5V 20 mA Gigabit Ethernet Controller 0 1000 Mbit sec link indicator active low Intel I210 AT GBE0_CTREF REF N A Center tab voltage not needed by Intel I210 AT 2 12 3 Serial ATA Signal Pin Type Signal Leve...

Page 21: ...BT SOC Considerable care must be taken when using high speed signals on the carrier board Reliable functionality depends on the following factors a Trace length on the carrier board b Number of vias used on the carrier board c PCB material and specification used for the carrier board d Target device 2 12 5 Express Card Support Signal Pin Type Signal Level Power Rail Remark Tolerance PU PD Descript...

Page 22: ...n the Carrier Board BT SOC USB_4_5_OC I CMOS 3 3V Sus 3 3V ePU 10 KΩ USB channels 4 and 5 over current sense A pull up for this line is present on the module An open drain driver from a USB current monitor on the Carrier Board may drive this line low Do not pull this line high on the Carrier Board Optional at MSC C10M BT Not available at MSC C10M BTC USB HUB controller USB_6_7_OC I CMOS 3 3V Sus 3...

Page 23: ...1 I CMOS 3 3V LPC serial DMA request not available LPC_SERIRQ I OD CMOS 3 3V 3 3V LPC serial interrupt BT SOC LPC_CLK O CMOS 3 3V eSR 10 Ω LPC clock output 33MHz nominal functional strap option BT SOC 2 12 8 LVDS eDP Signal Name LVDS Pin Number Signal Name eDP LVDS_A0 A71 eDP_TX2 LVDS_A0 A72 eDP_TX2 LVDS_A1 A73 eDP_TX1 LVDS_A1 A74 eDP_TX1 LVDS_A2 A75 eDP_TX0 LVDS_A2 A76 eDP_TX0 LVDS_A_CK A81 eDP_T...

Page 24: ...OS 3 3V ePU 2 2 KΩ I2C clock output for LVDS display use ANX1122 LVDS_I2C_DAT I OD CMOS 3 3V 3 3V ePU 2 2 KΩ I2C data line for LVDS display use ANX1122 2 12 8 2 eDP Signal Pin Type Signal Level Power Rail Remark Tolerance PU PD SR Description Source Target eDP_TX 0 3 eDP_TX 0 3 O PCIe AC coupled on module eDP differential pairs BT SOC eDP_VDD_EN O CMOS 3 3V 3 3V eDP power enable BT SOC eDP_BKLT_EN...

Page 25: ...rol channel differential pair BT SOC DP0_HPD I CMOS 3 3V 3 3V ePD 100KΩ DisplayPort Hot Plug Detect BT SOC DDI0_DDC_AUX_SEL I CMOS 3 3V 3 3V ePD 1MΩ If this input is floating the AUX pair is used for the DP AUX signals If pulled high the AUX pair contains the CTRLCLK and CTRLDATA signals 2 12 9 3 HDMI DVI Signal Pin Type Signal Level Power Rail Remark Tolerance PU PD SR Description Source Target T...

Page 26: ...AN_PWMOUT O CMOS 3 3V Fan speed control Uses the Pulse Width Modulation PWM technique to control the fan s RPM Embedded Controller FAN_TACHIN I CMOS 3 3V ePU 47 KΩ Fan tachometer input for a fan with a two pulse output Embedded Controller TPM_PP I CMOS 3 3V 3 3V ePD 4 7 KΩ Trusted Platform Module TPM Physical Presence pin Active high Function not supported TPM Note COM Express Specification R2 1 r...

Page 27: ...ternal battery is low BT SOC Embedded Controller LID I CMOS 3 3V Sus 12V ePU 47 KΩ iPU 40 50 KΩ LID switch Low active signal used by ACPI operating system for LID switch BT SOC Embedded Controller SLEEP I CMOS 3 3V Sus 12V ePU 47 KΩ iPU 40 50 KΩ Sleep button Low active signal used by ACPI operating system to bring the system to sleep state or wake it up again BT SOC Embedded Controller THRM I CMOS...

Page 28: ...BT SOC Embedded Controller 2 12 12 1 General Purpose I O Mapping MSC C10M BT GPIO Ball Name Location GPI 0 GPIO_S0_SC 034 AT28 GPI 1 GPIO_S0_SC 035 BD26 GPI 2 GPIO_S0_SC 036 AU28 GPI 3 GPIO_S0_SC 037 BA26 GPO 0 GPIO_S5 36 M2 GPO 1 GPIO_S5 37 N3 GPO 2 GPIO_S5 38 P2 GPO 3 GPIO_S5 39 L3 MSC C10M BTC GPIO Ball Name Location GPI 0 GPIO_S0_SC 034 AT28 GPI 1 GPIO_S0_SC 035 BD26 GPI 2 GPIO_S0_SC 036 AU28 ...

Page 29: ...8 MHz This pin is mapped to GPO0 BT SOC SDIO_CMD GPO1 O CMOS 1 8V 3 3V 1 8V 3 3V iPU 20 KΩ SDIO Command Response This signal is used for card initialization and for command transfers During initialization mode this signal is open drain During command transfer this signal is in push pull mode This pin is mapped to GPO1 BT SOC SDIO_WP GPO2 I CMOS 1 8V 3 3V 1 8V 3 3V iPD 20 KΩ SDIO Write Protect This...

Page 30: ...rriers shall use less than 100mA of SPI_POWER SPI_POWER shall only be used to power SPI devices on the Carrier BIOS_DIS 1 0 I CMOS 3 3V Sus 3 3V ePU 10 KΩ Selection straps to determine the BIOS boot device An External SPI BIOS Flash is currently not supported BIOS_DIS 1 0 SPI_CS1 Destination SPI_CS0 Destination Carrier SPI_CS SPI Descriptor BIOS Entry 1 1 Module Module HIGH Module SPI0 SPI1 1 0 Mo...

Page 31: ...the presence of 12V on this pin R2 0 Module types 1 6 will no connect this pin Type 10 Modules shall pull this pin to ground through a 47K resistor Carrier board logic 2 12 17 Power and GND Signal Pin Type Signal Level Power Rail Remark Tolerance PU PD SR Description Source Target VCC_12V Power 12V 5 Primary power input 12V 5 Wide input range 4 75V 20 0V Voltage Regulators VCC_5V_SBY Power 5V 5 St...

Page 32: ...27 WDT A27 BATLOW B27 WDT A28 S ATA_ACT B28 AC HDA_SDIN2 n c A28 S ATA_ACT B28 AC HDA_SDIN2 n c A29 AC HDA_SYNC B29 AC HDA_SDIN1 A29 AC HDA_SYNC B29 AC HDA_SDIN1 A30 AC HDA_RST B30 AC HDA_SDIN0 A30 AC HDA_RST B30 AC HDA_SDIN0 A31 GND FIXED B31 GND FIXED A31 GND FIXED B31 GND FIXED A32 AC HDA_BITCLK B32 SPKR A32 AC HDA_BITCLK B32 SPKR A33 AC HDA_SDOUT B33 I2C_CK A33 AC HDA_SDOUT B33 I2C_CK A34 BIOS...

Page 33: ...MSC C10M BT MSC C10M BTC User Manual 33 90 A64 PCIE_TX1 B64 PCIE_RX1 A64 PCIE_TX1 B64 PCIE_RX1 ...

Page 34: ...C_5V_SBY A86 RSVD B86 VCC_5V_SBY A87 eDP_HPD B87 VCC_5V_SBY A87 eDP_HPD B87 VCC_5V_SBY A88 PCIE0_CK_REF B88 BIOS_DIS1 A88 PCIE0_CK_REF B88 BIOS_DIS1 A89 PCIE0_CK_REF B89 DD0_HPD A89 PCIE0_CK_REF B89 DD0_HPD A90 GND FIXED B90 GND FIXED A90 GND FIXED B90 GND FIXED A91 SPI_POWER B91 DDI0_PAIR5 n c A91 SPI_POWER B91 DDI0_PAIR5 n c A92 SPI_MISO B92 DDI0_PAIR5 n c A92 SPI_MISO B92 DDI0_PAIR5 n c A93 GPO...

Page 35: ...efault values BIOS Recovery By shorting the pins of this jumper during boot the system is forced into crisis recovery mode For more information see chapter 7 6 These jumpers are located at the top side of the board at the border Fan Connector The fan connector is located on the top side of the CPU module directly beneath the CPU The following connector type is used Molex 53261 0471 The fan itself ...

Page 36: ...MSC C10M BT MSC C10M BTC User Manual 36 90 3 TACHO Input for the tacho signal from the fan open collector two pulses rotation 4 PWM PWM output signal for fan speed control ...

Page 37: ...g is enabled a counter is started which generates a reset if it is not retriggered within a programmable time window Possible watchdog delays 1s 5s 10s 30s 1min 5min 10min 30min Possible watchdog timeout 0 4s 1s 5s 10s 30s 1min 5min 10min The time delay starts as soon as it is enabled in the BIOS MSC provides a software API which gives the application software access to the Watchdog functionality ...

Page 38: ... 0 x I C Port 1 Dev 18h Func 1h 0 x TXE ME Dev 1Ah Func 0h 0 x HD Audio Dev 1Bh Func 0h 0 x PCI Express Root Port 1 Dev 1Ch Func 0h 0 x PCI Express Root Port 2 Dev 1Ch Func 1h 0 x PCI Express Root Port 3 Dev 1Ch Func 2h 0 x PCI Express Root Port 4 Dev 1Ch Func 3h 0 x EHCI USB Dev 1Dh Func 0h 0 x SMBus Port Dev 1Fh Func 3h 0 x Gbit Lan Controller connected at PCIe Root Port 4 Dev 0h Func 0h x x Not...

Page 39: ...BT MSC C10M BTC User Manual 39 90 Chipset PCIe lane 0 is connected to COMExpress connector lane 0 Chipset PCIe lane 1 is connected to COMExpress lane 1 and so on Note PCIe lane 3 is used for internal LAN device ...

Page 40: ...vices 4 Yes Not available for PCIe devices 5 Yes 6 Yes 7 Yes 8 No RTC 9 Yes shared SCI 10 Yes 11 Yes 12 No 13 No Math processor 14 Yes 15 Yes 16 Yes PIRQA 17 Yes PIRQB 18 Yes PIRQC 19 Yes PIRQD 20 No 21 No 22 No 23 No SMB Address Map Device Address ANX1122 50h 28h ANX1122 8Ch 46h SO DIMM 0 SPD EEPROM A0h 50h CMOS Backup EEPROM A8h 54h AAh 55h Embedded Controller C0h 60h 8 bit address with R W 7 bi...

Page 41: ...t any logo Activity Detection Background While the startup screen is displayed press the Setup Entry key ESC or DEL The system acknowledges the input and at the end of POST the screen clears and setup launches Note By pressing F10 during POST system will display a Boot Menu for directly booting a selected device Aptio Setup Utility With the AMI Aptio Setup program you can modify Aptio settings and...

Page 42: ...ial Port Console Redirection CPU Configuration PPM Configuration IDE Configuration Internal Devices Configuration Network Stack Configuration AMI Graphic Output Protocol Policy CSM Configuration NVMe SDIO Configuration USB Configuration Security Configuration WB627 SMSC 3114 SIO Configuration EC Hardware Monitoring Module specific Initialization Chipset Flat Panel Configuration North Bridge South ...

Page 43: ...ard to make a menu selection The Legend Bar Use the keys listed in the legend bar on the right side of the screen to make your selections or to exit the current menu The following table describes the legend keys and their alternates Key Function Esc Exit submenu Exit Setup utility without saving Left and right arrow keys Select Screen Up and down arrow keys Select Item Change Option F1 General Hel...

Page 44: ... Level Informative This feature shows what kind of user has entered the Aptio setup It depends on the Security Tab if a Administrator and or User password is set System Date Enter Date MM DD YYYY Set the system date on the real time clock System Time Enter Time HH MM SS Set the system time on the real time clock MSC Board Info Submenu Shows board specific information Hardware Monitoring Measuremen...

Page 45: ... Syste ever measured System Max Temperature Informative Shows the highest temperature of the Sysetm ever measured Memory Min Temperature Informative Shows the lowest temperature of the Memory ever measured Memory Max Temperature Informative Shows the highest temperature of the Memory ever measured EC Bootloader Version Informative Shows the bootloader version of the EC EC Firmware Version Informat...

Page 46: ...Table after Firmware Update In particular the board s UUID is preserved Preserve Boot Option Priorities Enabled Disabled If Enabled restore Boot Option Priorities after Firmware Update This option does not restore the Advanced Boot Device Selection in Boot Menu Verbose Mode Enabled Disabled If Enabled Firmware Update displays some messages on the console Beep Mode Enabled Disabled If Enabled Firmw...

Page 47: ...menu SDIO Configuration settings USB Configuration Submenu USB Configuration settings Security Configuration Submenu Security Configuration settings TXE WB627 SMSC 3114 SIO Configuration Submenu WB627 SMSC 3114 SIO Configuration settings EC Hardware Monitoring Submenu Fan Configuration settings Module specific Initialization Submenu Module specific Initialization 6 7 1 Trusted Computing TPM 1 2 Fe...

Page 48: ...t secure but might not be supported by all Operating Systems TPM 20 InterfaceType CRB TIS Select the Communication Interface to TPM 20 Device 6 7 3 ACPI Settings Feature Options Description Enable S4 Hibernation Enabled Disabled Enables or disables system ability to enter S4 state Hibernate This option may not effective with some OS Enable S3 Suspend Enabled Disabled Enables or Disabled System abi...

Page 49: ...tings Submenu The settings specify how the host computer and the remote computer which the user is using will exchange data Both computers should have the same or compatible settings 6 7 5 Console Redirection Submenu Feature Options Description Terminal Type ANSI VT100 VT100 VT UTF8 Emulation ANSI Extended ASCII char set VT100 ASCII char set VT100 Extends VT100 to support color function keys etc V...

Page 50: ...umber of rows and Columns supported redirection Putty KeyPad VT100 Linux XTERMR6 SCO ESCN VT400 Select FunctionKey and KeyPad on Putty Redirection after BIOS POST Always Enable Bootloader The Settings specify if BootLoader is selected then Legacy console redirection is disabled before booting to Legacy OS Default value is Always Enable which means Legaacy console Redirection is enabled for Legacy ...

Page 51: ...bled Custom Enable the power management features P STATE Coordination HW_ALL SW_ALL SW_ANY Change P STATE Coordination type CPU C6 report Enabled Disabled Enable Disable CPU C6 ACPI C3 report to OS Package C State limit C0 C1 C3 C6 C7 No Limit Package C State limit 6 7 7 PPM Configuration Feature Options Description EIST Enabled Disabled Enable or disable Intel Speedstep For more information see a...

Page 52: ...rt 0 Enabled Disabled Enable Disable Serial ATA Port 0 SATA Port 0 HotPlug Enabled Disabled Enable Disable Serial ATA Port 0 Hot Plug SATA Port 1 Enabled Disabled Enable Disable Serial ATA Port SATA Port 1 HotPlug Enabled Disabled Enable Disable Serial ATA Port 1 Hot Plug 6 7 9 Internal Devices Configuration Feature Options Description LPSS SCC Devices Mode PCI Mode ACPI Mode LPSS SCC Devices Mode...

Page 53: ...nable DDR50 Capability in SD Card controller PCU UART Enabled Disabled PCU UART Support Enable Disable PCU UART is connected to SER0 on COM Express connector LPSS HSUART 1 Enabled Disabled LPSS HSUART 1 Support Enable Disable Note Only available on specific BT variant LPSS HSUART 2 Enabled Disabled LPSS HSUART 2 Support Enable Disable HSUART 2 is connected to SER1 on COM Express connector 6 7 10 A...

Page 54: ...ed only EFI partitions can be booted To disable CSM first set Video Oprom to UEFI GateA20 Active Upon Request Always UPON Request GA20 can be disabled using BIOS services Always do not allow disabling GA20 this option is useful when any RT code is executed above 1MB Option ROM Messages Force Bios Keep current Set display mode for option ROM Interrupt 19 Response Immediate Postponed Bios reaction o...

Page 55: ... about initialised NVMe device 6 7 14 SDIO Configuration Feature Options Description SDIO Access Mode Auto DMA PIO Auto Option Access SD device in DMA mode if controller supports it otherwise in PIO mode DMA Option Access SD device in DMA mode PIO Option Access SD device in PIO mode 6 7 15 USB Configuration Feature Options Description Legacy USB Support Auto Enabled Disabled Enables Legacy USB sup...

Page 56: ...roperly reports itself to the Host Controller Auto uses default value for a Root port it is 100 ms for a Hub port the delay is taken from Hub descriptor Device power up delay Value 1 40 Delay range is 1 40 seconds in one second increments USB Mass Storage Device e g USB Stick Auto Floppy Forced FDD Hard Disk CD ROM Select Mass storage device emulation type Auto enumerates devices according to thei...

Page 57: ...C10M BT MSC C10M BTC User Manual 57 90 Feature Options Description TXE EOP Message Enabled Disabled Send EOP message before enter OS TXE Unconfiguration Perform None Revert TXE settings to factory defaults ...

Page 58: ...rce setting for COM A on Winbond SIO COM B Enabled Disabled Resource setting for COM A on Winbond SIO COM B Setting Auto I O 2F8h IRQ 3 I O 3F8h IRQ 3 4 5 6 7 10 11 12 I O 2F8h IRQ 3 4 5 6 7 8 10 11 12 I O 3E8h IRQ 3 4 5 6 7 10 11 12 I O 2E8h IRQ 3 4 5 6 7 10 11 12 Resource setting for COM A on Winbond SIO COM B Mode Normal IrDA1 2 ASK IR 1 4 Mode Setting for COM B on Winbond SIO LPT Disabled Enab...

Page 59: ... external sensor placed near the CPU and is not within the die itself By System Sensor Disabled Enabled If enabled the CPU fan will be controlled by this temperature sensor Please note that the CPU sensor is an external sensor placed near the CPU and is not within the die itself By Memory Sensor Disabled Enabled If enabled the CPU fan will be controlled by this temperature sensor Please note that ...

Page 60: ...will be selected Critical Temperature Limit C 60 110 C Temperature threshold in degrees celsius at which the CPU should be throttled Temperature is measured near the CPU and does not reflect ON DIE temperature CPU Temperature Hysteresis 2 C 4 C 6 C 8 C The value in degrees celsius that the temperature has to fall below a certain threshold before the next lower fan speed will be selected Detail exp...

Page 61: ...e by SETUP T3 Temperature limit for maximum Fan speed selectable by SETUP Thyst Temperature hysteresis selectable by SETUP Temperature Control with multiple Sensors Fan control allows the association of any temperature sensor supported by embedded controller This allows active fan control for more than one temperature The supported temperature sensors are associated with the following onboard temp...

Page 62: ...T mode Windows will not automatically turn off the system but instead shows an information message Watchdog Start on Boot No Yes Start the watchdog after BIOS POST if enabled Startup Delay 1s 10s 30s 1min 5min Select the initial delay value This is an additional one time delay before the standard timeout timer is started Event Timeout 1s 10s 30s 1min 5min Select the timeout value after which the w...

Page 63: ...on Settings Feature Options Description NIC Configuration Submenu Settings for the specified network controller Link Speed Auto Negotiaded 10 Mbps Half 10 Mbps Full 100 Mbps Half 100 Mbps Full Specifies the port speed used for the selected boot protocol Note this option is only visible due to Bios code limitiation and has no effect when changing options Wake On Lan Enabled Disabled Enables the ser...

Page 64: ...type is used if valid EDID data cannot be found in external Eeprom or non volatile BIOS NVRAM If None is selected LVDS controller is disabled LVDS Mapping 18bit 24bit LDI 24bit FPDI Select LVDS mapping type LVDS Spread Spectrum Disabled 0 25 to 1 75 in 0 25 steps Configure the spread spectrum for the LVDS interface Number of LVDS channels Single Channel 1bpp Dual Channel 2bpp Select number of pixe...

Page 65: ...bled Disabled Enabling this will double the DRAM refresh rate at the cost of memory bandwidth 10 Required for iTemp memory support and countering the rowhammer attack Double data rate memory refresh should be enabled whenever system 60 C temperature is used 6 8 3 1 Graphics Configuration Feature Options Description Integrated Graphics Device Enabled Disabled Enable Enable Integrated Graphics Devic...

Page 66: ...Mem 128 MB 256 MB Max Select DVMT 5 0 Total Graphic Memory size used by the Internal Graphics Device Aperture Size 128 MB 256 MB 512 MB Select the Aperture Size DOP CG Enabled Disabled Enable Disable DOP Clock Gating GTT Size 1 MB 2MB Select the GTT Size Spread spectrum clock Enabled Disabled Enable Disable Spread Spectrum clock RC6 Render Standby Enabled Disabled Check to enable render standby su...

Page 67: ...erial IRQ Mode Global SMI Lock Enabled Disabled Enable or Disable SMI lock Bios Read Write Protection Enabled Disabled Enable or Disable BIOS SPI region read write protect 6 8 4 1 Azalia HD Audio Feature Options Description LPE Audio Support Disabled Enabled Select LPE Audio ACPI mode or PCI mode Audio Controller Enabled Disabled Control Detection of the Azalia device Disabled Azalia will be uncon...

Page 68: ...or driver installation USB2 Link Power Management Enabled Disabled Enable Disable USB2 Link Power Management USB 2 0 EHCI Support Enabled Disabled Control the USB EHCI USB 2 0 functions One EHCI controller must always be enabled USB Port 0 Enabled Disabled Enable Disable USB Port 0 USB Port 1 Enabled Disabled Enable Disable USB Port 1 USB Port 2 Enabled Disabled Enable Disable USB Port 2 USB Port ...

Page 69: ... is only prompted for when entering Setup If ONLY the User s password is set then this is a power on password and must be entered to boot or enter Setup In Setup the User will have Administrator rights 6 9 1 Secure Boot Feature Options Description Attempt Secure Boot Enabled Disabled Secure Boot activated when Platform Key PK is enrolled System mode is User Deployed and CSM function is disabled No...

Page 70: ...r Mode install all Factory Default keys Enroll Efi Image Enter Enroll Efi Image Save all Secure Boot variables Enter Save NVRAM content of Secure Boot policy variables to the files EFI_SIGNATURE_LIST data format in root folder on a target file system device Platform Key PK Enter Enroll Factory Defaults or load certificates from a file 1 Public Key Certificate in a EFI_SIGNATURE_LIST b EFI_CERT_X50...

Page 71: ...s Storage and specific USB port device will NOT be available before OS boot If Full Initial all USB devices will be available in OS and Post Note If disabled entering Setup will only be possible by performing a System Reset with Reset Button during OS Boot or by clearing CMOS with the Clear CMOS Jumper PS2 Devices Support Enabled Disabled If disabled PS2 devices will be skipped Network Stack Drive...

Page 72: ...ices which are connected This windows shows the actual configured boot priority list which is set in the Boot Priority options above Examples to restrict the boot device priority Example 1 Only the Harddisk on SATA Port 0 should be bootable Select Boot Priority 1 to SATA Port 0 Set allow other devices to no Example 2 USB Stick legacy boot path on Port 3 should have the highest boot priority SATA H...

Page 73: ...can restore the Default Values as described below or try to change the selections that caused the boot to fail Discard Changes and Exit Exit system setup without saving any changes Save Changes and Reset When you have completed the system configuration changes select this option to save the changes and reboot the system so the new system configuration parameters can take effect Discard Changes and...

Page 74: ...tly from it Launch EFI Shell from filesystem device Attempts to Launch EFI Shell application Shellx64 efi from one of the available filesystem devices WARNING This function will still work even if mass storage devices are not registered into the boot device list via MSC BIOS Configuration tool MBconf tool For example only Harddisk is registered as possible boot device and a USB Stick with an EFI s...

Page 75: ...ta etc The update file a complete SPI firmware image has to be stored at a fixed location within the file system on a mass storage device BIOS loads the file into RAM performs optional security checks and finally programs the data to the BIOS FLASH according to supplied control flags Supported mass storage devices platform dependent USB SATA eMMC Supported file systems platform dependent FAT EXT3 ...

Page 76: ...ASH tool as root and if needed set the permission for the file with chmod 775 AutoFLASH sudo AutoFLASH u e u update e Entire Flash h Help Then reboot system The update will start automatically after the reboot Bios Update from Windows It is also possible to trigger the update from Windows versions which boot in UEFI Mode Make sure the Bios Image is stored at Recovery FlashImg bin and the device is...

Page 77: ...N POST 32 POST F5 Power cycle NOTICE During Bios recovery there is no video output Users have to wait until power cycle will be performed So it is recommended to wait some minutes until power cycle is performed Bios Recovery for BIOS version older than V1 50 If a Bios update will be interrupted e g due to power loss before the update has finished it can happen that the system will not boot In this...

Page 78: ...lidated thus forcing the board to start up with default values BIOS Recovery By shorting the pins of this jumper during boot the system is forced into crisis recovery mode For more information see chapter 7 6 These jumpers are located on the top side of the board Post Codes For Post Code information please look on the MSC Technologies Support Website or contact Avnet Integrated MSC Technical Suppo...

Page 79: ...al limits as well as the number of cores currently in use and the maximum frequency of the active cores For more information about Intel Turbo Boost 2 Technology visit the Intel website Note Turbo Boost will only work if EIST is enabled Reference http en wikipedia org wiki Intel_Turbo_Boost ASPM Active State Power Management Active State Power Management or ASPM is a power management protocol used...

Page 80: ...virtualization of Intel platforms Reference http ark intel com VTList aspx http www intel com technology itj 2006 v10i3 2 io 7 conclusion htm Fast Boot Fast Boot supported by Aptio provides faster boot time by learning the system configuration on the first boot On the Next boot system boots faster because the bios will only use the best boot path from the first OS boot It configures only devices n...

Page 81: ...rg wiki Trusted_Platform_Module TXT Trusted Execution Technology Due to the complexity of this feature please visit http www intel com content dam www public us en documents white papers trusted execution technology security paper pdf Note To use this feature VT Vt d SMX and TPM must be enabled PXE Boot Preboot eXecution Environment is used for booting from network controller For legacy PXE boot l...

Page 82: ... application access to hardware specific information as well as hardware resources Following features are supported view board information access to NVRAM access to I2C control GPIO s control backlight set watchdog timer view sensor values of hardware monitor MSC provides a software package which is downloadable here after registration https www msc technologies eu de support boards com express ms...

Page 83: ...Windows based tool and is available from MSC It allows customers to configure the preferred default values in their BIOS splash screen custom LVDS display timing and other features For more details please refer to the MSC Technologies Support Website or contact MSC Technical support ...

Page 84: ... mass storage devices Here you can choose between Floppy Forced Floppy Hard Disk or CD ROM behavior of your USB stick Issue 3 SATA 6Gb s SATA 6Gb s behavior is functional only with SATA 6Gb s cable Solution Use SATA 6Gb s cable Issue 4 Powercycle at startup If no RTC is used System will perform a extra powercycle at startup because TXE is enabled as default Disabling this option in Bios setup will...

Page 85: ...ices If your LPSS SCC Device does not work correctly please check the LPSS SCC Device Mode configuration see chapter 7 8 7 Internal Device Configuration For additional help please contact MSC Technical Support Phone 49 8165 906 200 Email support msc technologies eu ...

Page 86: ...n the documentation and or other materials provided with the distribution 3 All advertising materials mentioning features or use of this software must display the following acknowledgment This product includes software developed by the OpenSSL Project for use in the OpenSSL Toolkit http www openssl org 4 The names OpenSSL Toolkit and OpenSSL Project must not be used to endorse or promote products ...

Page 87: ... use as long as the following conditions are aheared to The following conditions apply to all code found in this distribution be it the RC4 RSA lhash DES etc code not just the SSL code The SSL documentation included with this distribution is covered by the same copyright terms except that the holder is Tim Hudson tjh cryptsoft com Copyright remains Eric Young s and as such any Copyright notices in...

Page 88: ...NCLUDING BUT NOT LIMITED TO PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES LOSS OF USE DATA OR PROFITS OR BUSINESS INTERRUPTION HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY WHETHER IN CONTRACT STRICT LIABILITY OR TORT INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE The licence and distribution terms for any public...

Page 89: ...E GOODS OR SERVICES LOSS OF USE DATA OR PROFITS OR BUSINESS INTERRUPTION HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY WHETHER IN CONTRACT STRICT LIABILITY OR TORT INCLUDING NEGLIGENCE OR OTHERWISE ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE Features Internal crypto implementation optional X 509 certificate processing in PEM and DER formats ...

Page 90: ...plemented with existing wlan hardware This is called Wi Fi Protected Access TM WPA This has now become a mandatory component of interoperability testing and certification done by Wi Fi Alliance Wi Fi provides information about WPA at its web site http www wi fi org OpenSection protected_access asp IEEE 802 11 standard defined wired equivalent privacy WEP algorithm for protecting wireless networks ...

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