Avnet AES-ATT-M18QWG-SK-G, Hardware User'S Manual

Page: 19 / 52

Page 19
Table 3
– J1 Expansion Connector Pinout (Outer Row)
J1
pin
Signal Name Description
WNC
pin
PU
/PD
WNC
Modem Mode
WNC
Host Mode
2
REG_EN 3V8 Regulator Enable - PD - -
4 ADC_H ADC ext. input (to JP2) 122 PD ADC (via JP2) ADC (via JP2)
6 UART1_CTS CTS for W NC UART1 80 PD UART1_CTS UART1_CTS
8 UART1_RTS RTS for W NC UART1 81 PD UART1_RTS UART1_RTS
10 GPIO02 GPIO02 53 PD GPIO02 GPIO02
12 GPIO03 GPIO03 54 PD GPIO03 GPIO03
14 GPIO04 GPIO04 55 PD GPIO04 GPIO04
16 GND GND - - -
18
GPIO95 GPIO95 95 PD GPIO95 GPIO95
20 GPIO94 GPIO94 94 PD GPIO94 GPIO94
22 EPHY_RST_N EPHY_RST_N 103 PD - EPHY_RST_N
24
GPIO96 GPIO96 96 PD GPIO96 GPIO96
26 GPIO97 GPIO97 97 PD GPIO97 GPIO97
28 I2C_SCL I2C_SCL 61 PD I2C_SCL I2C_SCL
30
I2C_SDA I2C_SDA 60 PD I2C_SDA I2C_SDA
32 GPIO93 GPIO93 (output only) 93 NP GPIO93 GPIO93
34 GND
GND - - -
36 GND
GND - - -
38 SGMII_MDIO SGMII MDIO 121 - SGMII_MDIO
40
SPI1_EN SPI1 Enable / SDC1_DATA1 127 PD SPI1_EN SPI1_EN
42
SPI1_CLK SPI1 Clock / SDC1_DATA0 128 PD SPI1_CLK SPI1_CLK
44 GND
GND - - -
46
GPIO06 GPIO06 130 PD GPIO06 GPIO06
48
GPIO07 GPIO07 131
PU
GPIO07 GPIO07
50
EPHY_INT_N EPHY_INT_N 132 PD GPIO08 EPHY_INT_N
/ GPIO08
52 WAKEUP_OUT WAKEUP_OUT 143 PD WAKEUP_OUT WAKEUP_OUT
54
WAKEUP_IN WAKEUP_IN 144 PD WAKEUP_IN WAKEUP_IN
56
RESET_N RESET_N 145 PD RESET_N RESET_N
58 1V8_VREF WNC 1.8V LDO Output 146 VREF VREF
60 1V8_VREF
WNC 1.8V LDO Output 146 VREF VREF
PD : Pull-Down
PU : Pull-Up
NP : Non-Pull