Page 18
Table 2
– J1 Expansion Connector Pinout (Inner Row)
J1
pin
PCB Signal
Name
Description
WNC
pin
PU
/PD
WNC
Modem Mode
WNC
Host Mode
1
VIN
DC Input Voltage (5V)
-
-
-
3
VIN
DC Input Voltage (5V)
-
-
-
5
VIN
DC Input Voltage (5V)
-
-
-
7
VIN
DC Input Voltage (5V)
-
-
-
9
UART1_RX
Receive for W NC UART1
82
PD
UART1_RX
UART1_RX
11
UART1_TX
Transmit for WNC UART1
83
PD
UART1_TX
UART1_TX
13
UART2_RX
Receive for W NC UART2
106
PD
UART2_RX
UART2_RX
15
UART2_TX
Transmit for WNC UART2
107
PD
UART2_TX
UART2_TX
17
USB_D-
USB Data Negative
88
USB_DN
USB_DN
19
USB_D+
USB Data Positive
86
USB_DP
USB_DP
21
GND
GND
-
-
-
23
SGMII_MDC
SGMII Management
data clock
120
-
SGMII_MDC
25
GND
GND
-
-
-
27
SDC1_CLK
SDC1 Clock
124
-
SDC1_CLK
29
SDC1_CMD
SDC1 Command
123
-
SDC1_CMD
31
SPI1_MOSI
SPI1 MOSI / SDC1_DATA3
125
PD
SPI1_MOSI
SPI1_MOSI
33
GND
GND
-
-
-
35
SPI1_MISO
SPI1 MISO / SDC1_DATA2
126
PD
SPI1_MISO
SPI1_MISO
37
SPI2_MOSI
SPI2 MOSI
62
PD
-
SPI2_MOSI
39
SPI2_MISO
SPI2 MISO
63
PD
-
SPI2_MISO
41
GND
GND
-
-
-
43
SGMII_RX_M
SGMII receive
– minus
59
-
SGMII_RX_M
45
SGMII_RX_P
SGMII receive
– plus
58
-
SGMII_RX_P
47
SGMII_TX_M
SGMII transmit
– minus
57
-
SGMII_TX_M
49
SGMII_TX_P
SGMII transmit
– plus
56
-
SGMII_TX_P
51
GND
GND
-
-
-
53
PCM_CLK
PCM Clock
49
PD
PCM_CLK/GPIO49
PCM_CLK/GPIO49
55
PCM_DOUT
PCM Data Out
48
PD
PCM_DOUT/GPIO48
PCM_DOUT/GPIO48
57
PCM_DIN
PCM Data In
47
PD
PCM_DIN/GPIO47
PCM_DIN/GPIO47
59
PCM_SYNC
PCM Sync
46
PD
PCM_SYNC/GPIO46
PCM_SYNC/GPIO46
PD
: Pull-Down
PU
: Pull-Up
NP
: Non-Pull
Summary of Contents for AES-ATT-M18QWG-SK-G
Page 12: ...Page 12 2 2 LTE IoT System Board Block Diagram Figure 2 LTE IoT System Board Block Diagram ...
Page 15: ...Page 15 Figure 6 Use Cases for Avnet LTE IoT Boards ...
Page 20: ...Page 20 Figure 10 Expansion Connector Pin Numbering ...
Page 35: ...Page 35 ...
Page 41: ...Page 41 ...
Page 46: ...Page 46 ...