AUTHENTEC EntrePad AES2501A Manual Download

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2317Rev 1.1 (17NOV04)

EntréPad AES2501A FINGERPRINT SENSOR

Product Specification

For Universal Serial Bus Applications

Hardware Reference

2317 Rev 1.1

November 17, 2004

AuthenTec Confidential Information

AuthenTec, Inc.

Post Office Box 2719

Melbourne, Florida 32902-2719

321-308-1300

www.authentec.com

Summary of Contents for EntrePad AES2501A

Page 1: ...NT SENSOR Product Specification For Universal Serial Bus Applications Hardware Reference 2317 Rev 1 1 November 17 2004 AuthenTec Confidential Information AuthenTec Inc Post Office Box 2719 Melbourne Florida 32902 2719 321 308 1300 www authentec com ...

Page 2: ...OR CONSEQUENTIAL OR INCIDENTAL DAMAGES THE ABOVE LIMITATION MAY NOT APPLY TO YOU U S Government Restricted Rights AuthenTec software and documentation are provided with RESTRICTED RIGHTS Use duplication or disclosure by the government is subject to restrictions as set forth in subparagraph c 1 ii of the Rights in Technical Data and Computer Software clause at DFARS 252 227 7013 or subparagraph c 1...

Page 3: ...5 3 Finger Detect Auto calibration 20 5 SYSTEM INTERFACE DESCRIPTIONS 21 5 1 INTERFACE SELECT CONTROL 21 5 2 USB INTERFACE 22 5 3 RESET 24 6 SOFTWARE INTERFACE DETAILS 25 6 1 REGISTER MAP 25 6 1 1 1 Control Register 1 CTRL1 80h 27 6 1 1 2 Control Register 2 CTRL2 81h 28 6 1 1 3 Excitation Common Controls EXCITCTRL 82h 29 6 1 1 4 Detect Control DETCTRL 83h 30 6 1 1 5 Navigation Correlation Range NA...

Page 4: ... ACh 51 6 1 1 32 Single Reg Address SREGADDR ADh 52 6 1 1 33 FDRV X HI FDRVXHI AEh 53 6 1 1 34 FDRV X LO FDRVXLO AFh 53 6 1 1 35 Watchdog Control WDCtrl B0h 54 6 1 1 36 Misc Image Control GPIO Disable MISCICTRL B3h 55 6 1 1 37 SOF Timestamp FreeRun 13 7 SOFTIMEHIGH BAh 56 6 1 1 38 SOF Timestamp FreeRun 6 0 SOFTIMELOW BBh 56 6 1 1 39 EOF Timestamp 13 7 EOFTIMEHIGH BCh 56 6 1 1 40 EOF Timestamp 6 0 ...

Page 5: ...ure 5 2 SIO Pin Definitions for the USB Interface 21 LIST OF TABLES Table 4 1 CLKSEL 2 0 Decode 18 Table 5 2 Device Descriptor 22 Table 5 3 Default Configuration Descriptor 23 Table 5 4 Default Interface 0 Alternate Setting 0 Descriptor 23 Table 5 5 Default Interface 0 Alternate Setting 0 Bulk Endpoint Descriptors 23 Table 5 6 String 0 Descriptor 24 Table 6 1 Registers Summary 26 Table 7 1 Command...

Page 6: ...gerprint s underlying structure A powerful utility contained within TruePrint Technology is Dynamic Optimization This tool analyzes each image controlling up to 15 parameters real time to optimize the fingerprint image slices regardless of unusual skin conditions or surface contamination This functionality is built right into the sensor hardware or you can perform these functions in software for t...

Page 7: ...support interface activity It is then necessary for the system SW to program the sensor for the desired operation Imaging or Navigation After this setup the requested operation is enabled by setting the Op Enable bit located in Register 80h D2 If Imaging is selected the Sensor enters finger detect mode checks for a finger present at a rate programmed by the Finger Detect Rate setting The default r...

Page 8: ...d detect rate AuthenTec has application notes to support the integration of the AES2501A for all available interface options Contact AuthenTec for availability 1 5 Navigation Using the AES2501A The navigation use model is a button replacement system The typical Left Right Up Down button functionality can be easily emulated on the sensor by statically touching the sensor to indicate desired left or...

Page 9: ...G Storage Temperature 65 150 C Latch Up Latch Up Immunity JEDEC JESD78 100 mA TSOL Soldering Temperature 240 C ESDPIN Pin level ESD Immunity JESD22 Method A114 B 2000 2000 V ESDPACKAGE Package level ESD Immunity IEC61000 4 2 Level 4 Air Discharge method using AuthenTec approved reference design 15 15 KV Figure 2 1 Absolute Maximum Ratings 2 2 Recommended Operating Conditions Symbol Parameter Min T...

Page 10: ...rating Conditions Unless otherwise specified VI VDD or VSS TAmbient 25 C Symbol Parameter Conditions Min Typ Max Units VOH High Level Output Voltage IOH 2mA Vdd 0 3 V VOL Low Level Output Voltage IOL 2mA 0 3 V IIL Low Level Input Current VI VIL min 1 µA IIH High Level Input Current VI VIH max 1 µA IOZ High Impedance State Output Current 20 µA USB Interface Supply Currents IDDQ Supply Current Imagi...

Page 11: ...rted to 4 bit or 2 bit values The high and low reference voltages for the ADC are programmable via 7 bit DACs TruePrint Signal A D Converter High Reference Low Reference Pixel Data Pixel Sense Amp Pixel Antenna Plate Synthesizer D A Converter Output Buffer Drive Ring Figure 3 1 AES2501A Functional Diagram The sensing element of each pixel is an RF sense amplifier which picks up the TruePrint high ...

Page 12: ...ollowing diagram shows a top level block diagram of the Sensor IC Pixel Array Row Ctrl Column Ctrl Analog Channel Serial A D Registers Scan Timing And Control Synthesizer Excitation Generator USB Input USB Interface Finger Ring Drive USB Interface USB Output Figure 3 2 Internal Chip Block Diagram ...

Page 13: ... Pin Definitions 4 1 Packaging Information The AES2501A sensor is housed in a plastic 48 Ball Grid Array package The most current PDF version of this package drawing can always be viewed printed or downloaded at http www authentec com products docs AES2501A_48_BGA_Pkg pdf ...

Page 14: ...ls The Pin 1 indicator is a gold triangle located in the corner of the package adjacent to pin one Post assembly top side inspection can be performed visually using the fact that the drive bars are of different thickness One Bar is 0 84mm the other is 0 70mm When the thicker drive bar is located at the top of the device from the inspection viewpoint pin one is located top left from the same perspe...

Page 15: ...assive Static CT1 A4 Output Active FINGERDRIVE A5 Input Static RESET A6 Reserved N C A7 Reserved N C A8 Power VDD A9 Power GND A10 Passive Static PLL_FILTER A11 Input Active SYS_CLK A12 Output Active DRIVE_RING B1 Input Static CLKSEL2 B2 Power GND B3 Power VDD B4 Input Static VDDL B5 Input Static VDDL B6 Input Static CLKSEL1 B7 I O Active SUSPEND B8 I O Active USB_OE B9 I O Active D B10 I O Active...

Page 16: ...1 Pin Type and Activity Definitions Power Power Supply Connections Passive Connections to passive components ex Filter caps etc Input Active Inputs to the sensor Output Active Outputs from the sensor I O Active I O s from the sensor state configuration dependent Reserved Do Not Connect anything to these pins Static DC or slowly changing voltages Active Active Signals Digital or Analog VDDL Fixed A...

Page 17: ...urrent control Refer to Ref Design D8 OVC_VDD Over Current Detect Circuit Digital Power Supply Pin V Refer to Ref Design D10 OVC_VDDA Over Current Detect Circuit Analog Power Supply Pin V Refer to Ref Design A5 RESET Reset input 2 3 threshold voltage with hysteretic input Approximately 57 Kohm pull up resistor internal with tolerance of 30 See section 5 3 for additional definition of a proper rese...

Page 18: ...sonator or Clock Frequency 0 0 0 6 MHz 0 0 1 Reserved 0 1 0 12 MHz 0 1 1 18 MHz 1 0 0 24 MHz 1 0 1 Reserved 1 1 0 Reserved 1 1 1 48 MHz PLL Bypass clock only Table 4 1 CLKSEL 2 0 Decode For USB applications Crystal Resonator frequency options include 6 12 18 and 24MHz 4 4 1 Clock Specification For the AES2501A there are several different clocking options available Crystal connection ceramic resona...

Page 19: ...SYSCLK device pin the following timing diagram applies 1 Parameter 1 Minimum 1 Maximum 2 Freq USB Interface 2 12MHz 0 25 2 12MHz 0 25 3 Jitter USB Interface 3 3 0 2ns 4 Tr 4 4 3ns 5 Tf 5 5 3ns 6 Thigh 6 45 Tperiod 6 55 Tperiod 7 Tlow 7 45 Tperiod 7 55 Tperiod Figure 4 3 External Clock Specifications ...

Page 20: ... This requires that the total current consumption be less than 100 mA and suspend current be less than 500uA For all timing diagrams please refer to the Universal Serial Bus Specification Version 2 0 The AES2501A fully supports the USB selective suspend mode C3 power state 4 5 3 Finger Detect Auto calibration When using Finger Detect delay method the device is automatically calibrated once on powe...

Page 21: ...the USB interface the following pin assignments apply SIO Pin USB See section DIR SIO0 B8 USB_OE O SIO1 B7 SUSPEND O SIO2 C7 PID0 I O SIO3 C8 PID1 I O SIO4 B12 PID2 I O SIO5 B11 PID3 I O SIO6 B10 D I O SIO7 B9 D I O SIO8 C9 ENUM O Figure 5 1 SIO Pin Definitions for the USB Interface AuthenTec Vendor ID 08FFh Product ID 258xh ...

Page 22: ...ation for all USB configurations Field Index Value Meaning bLength 0 12h Length of this descriptor 18 bytes bDescriptorType 1 01h Descriptor Type Device bcdUSB L 2 10 USB spec version 1 10 L bcdUSB H 3 01 USB spec version 1 10 H bDeviceClass 4 FFh Device class FF is vendor specific bDeviceSubClass 5 FFh Device sub class FF is vendor specific bDeviceProtocol 6 FFh Device Protocol FF is vendor speci...

Page 23: ...g 0 bNumEndpoints 4 02h Number of endpoints in this interface not counting endpoint0 bInterfaceClass 5 FFh Interface Class vendor specific bInterfaceSubClass 6 FFh Interface Sub Class vendor specific bInterfaceProtocol 7 FFh Interface Protocol vendor specific Interface 8 00h Index to string descriptor none Table 5 3 Default Interface 0 Alternate Setting 0 Descriptor Field Index Value Meaning bLeng...

Page 24: ... r 00 Table 5 6 String 1 Descriptor A remote wakeup feature supports finger detect while the host has the sensor in the Suspend state For finger detect wakeup an internal low power low frequency oscillator is used to cycle the 12 MHz oscillator on and off with finger detect attempted whenever the 12 MHz oscillator is enabled This cycle timing through the Finger Detect Rate register is selectable S...

Page 25: ...0h 8Ch Demod Phase 13 Demod Phase 12 Demod Phase 11 Demod Phase 10 Demod Phase 9 Demod Phase 8 Demod Phase 7 40h 8Dh Reserved Reserved Reserved Reserved Reserved Reserved Reserved 00h 8Eh Reserved Gain 2 1 Gain 2 0 Reserved Reserved Gain1 1 Gain1 0 00h 8Fh Bias2 Unlock Bias 2 1 Bias 2 0 Reserved Bias1 Unlock Bias 1 1 Bias 1 0 00h 90h Carrier Null En Carrier Null 5 Carrier Null 4 Carrier Null 3 Car...

Page 26: ...e Reg ID 0 00h AEh Reserved Reserved Reserved Reserved FDRV X 9 FDRV X 8 FDRV X 7 XXh AFh FDRV X 6 FDRV X 5 FDRV X 4 FDRV X 3 FDRV X 2 FDRV X 1 FDRV X 0 XXh B0h Reserved Reserved Watchdog Enable Reserved Watchdog Time 2 Watchdog Time 1 Watchdog Time 0 00h B1h Reserved Reserved Reserved Reserved Reserved Reserved Reserved 00h B2h Reserved Reserved Reserved Reserved Reserved Reserved Reserved 00h B3...

Page 27: ... disabled except when enabled by interface activity Scan Reset 1 Perform a scan reset This stops any imaging scan currently in progress and restarts the scan sequencer at recheck for finger present If an image scan is not in progress no action is performed This bit is self resetting and will always read back as zero Master Reset 1 Perform a master reset same as Power On Reset This resets all regis...

Page 28: ...inuous Scan bit must be low for this to have any effect This bit is self resetting The value read for this bit position indicates a single scan is pending Scan pending can be reset by Scan Reset or Master Reset or by the Clear One Shot bit Read Registers 1 Read the current state of the local registers in the Sensor IC The request is responded to only if not in Imaging mode This bit is self resetti...

Page 29: ...digital finger detect auto update function 0 Enables digital finger detect auto update function Demod Blk Disable 1 Disables option of setting Demod Clock low during DCRSTR 0 Normal operation Calibrate Finger Det 1 Re calibrate finger detect timer count Should be done when finger is not on sensor This bit is self resetting and always reads back as a 0 Timer Free Run 1 SOF TIMESTAMP is a free runni...

Page 30: ...and finger detect circuitry are turned on For all settings except continuous the stimulus is turned on for 128 us The 16mS and 31mS settings get remapped to 62mS in SUSPEND state with the Remote Wakeup feature enabled 000 Detection is continuous 001 Detect cycles occur every 16 msec 010 Detect cycles occur every 31 msec 011 Detect cycles occur every 62 msec 100 Detect cycles occur every 125 msec 1...

Page 31: ...hen in navigation mode and imaging mode for determining shifts to peak correlation This value limits the number of pixel shifts of the reference images when correlating with the current center column of pixel data When reference columns are shifted the fill data is 0 which can in some circumstances cause errors in the correlation data The default value in this register should be acceptable for mos...

Page 32: ...ets location of Left Right columns for navigation purposes 1 Navigation Left column is at 32 Right column is at 159 0 Navigation Left column is at 16 Right column is at 175 NAV_THRESH 3 0 Sets threshold for image correlation When Up correlation results are compared to Down correlation results the difference between them must be greater than NAV_THRESH in order for a direction answer to be generate...

Page 33: ... D7 D6 D5 D4 D3 D2 D1 D0 Reserved Reserved Reserved Reserved Detect Freq 2 Detect Freq 1 Detect Freq 0 0 0 0 0 0 0 0 0 1 Detect Frequency Sets the frequency of the excitation generator when in Detect mode Out of range values default to the 2 MHz setting 001 125 KHz 010 250 KHz 011 500 KHz 100 1 MHz 101 2 MHz ...

Page 34: ...dditional data is the time to send the end of frame data 9 bytes authentication word and header plus 64 bytes register data and assumes the lowest valid baud rate The Min Baud Rate shown is the lowest baud rate that can be used in gray scale mode non packed without causing scanning to pause The pixel integration time can be calculated using the equation Pixel integration time Column Rate 20us Valu...

Page 35: ...d Reserved Measure Square Reserved Reserved Measure Drive 1 Measure Drive 0 0 0 0 0 0 0 0 1 0 Measure Square 1 Selects square wave drive during measure 0 Selects sine wave drive during measure Measure Drive Sets the drive level of the excitation generator when using sine wave in Measure mode 00 0 325 Vpp 01 0 65 Vpp 10 1 3 Vpp 11 2 6 Vpp ...

Page 36: ...eq 0 0 0 0 0 0 0 1 0 1 Measure Frequency Sets the frequency of the excitation generator when in Detect mode Out of range values default to the 2 MHz setting 001 125 KHz 010 250 KHz 011 500 KHz 100 1 MHz 101 2 MHz For best results the measurement frequency and column scan rate should be selected so that at least 16 cycles of the measurement frequency occur during the integration time period see col...

Page 37: ... Phase 8 Demod Phase 7 0 0 1 0 0 0 0 0 0 Demod Phase Combined with the next register Demod Phase 1 these set the phase of the demodulation clock relative to the positive zero crossing of the excitation generator The bit weighting has the following relative scales Bit 13 bit weight 180 degrees Bit 7 bit weight 2 8125 degrees Bit 6 bit weight 1 40625 degrees Bit 0 bit weight 0 02197256 degrees Defau...

Page 38: ...D0 Reserved Sensor Gain 2 1 Sensor Gain 2 0 Reserved Reserved Sensor Gain 1 1 Sensor Gain 1 0 0 0 0 0 0 0 0 0 0 Sensor Gain 2 Sets the gain in the second stage of the analog channel channel buffer 00 2x 01 4x 10 8x 11 16x Sensor Gain 1 Sets the gain in the first stage of the analog channel array buffer 00 2x 01 4x 10 8x 11 16x ...

Page 39: ...uency Sensor Bias 2 Sets the bias current in the second stage of the analog channel channel buffer 00 150 uA 01 300 uA 10 600 uA 11 1200 uA Bias 1 Unlock Sets the bias current in the first stage of the analog channel array buffer 0 Bias 1 is locked to measure frequency 1 Bias 1 is not locked to measure frequency Sensor Bias 1 Sets the bias current in the first stage of the analog channel array buf...

Page 40: ...0 0 0 0 0 0 Carrier Null Enable 1 Enables Carrier Null 0 Disables Carrier Null Carrier Offset Null Adds a negative voltage to the signal prior to the A D The table below shows the voltages associated with each setting for a typical VCC of 3 3V Voos is the DAC output and the Output Step is the voltage summed with the signal Vstep 0 103125 setting 1 based on Vdd 3 30V Value Voos Output Step 000000 0...

Page 41: ...high reference voltage to the A D converter The actual voltage reference to the A D is Vdd 128 setting 1 based on Vdd 3 30V default 70h 6 1 1 17 A D Reference Low ADREFLO 92h Reset Value D7 D6 D5 D4 D3 D2 D1 D0 A D Ref Low 6 A D Ref Low 5 A D Ref Low 4 A D Ref Low 3 A D Ref Low 2 A D Ref Low 1 A D Ref Low 0 0 0 0 1 0 0 0 0 0 A D Reference Low Sets the low reference voltage to the A D converter The...

Page 42: ...alue 4 6 1 1 19 End Column ENDCOL 96h Reset Value D7 D6 D5 D4 D3 D2 D1 D0 End Column 6 End Column 5 End Column 4 End Column 3 End Column 2 End Column 1 End Column 0 0 0 1 1 1 1 1 1 1 End Column Sets the ending column for an image scan The actual ending column is value 4 3 or shift the end column value left 2 bits and set the lowers to lsb s to 1 to get the actual end column The end column should n...

Page 43: ...ge For example the values from the first two 16 pixel columns yield are averaged in groups of four to provide 8 averaged pixel values 0 Normal operation Image data is 4 bits per pixel and packed 2 pixels per byte Image Resolution 1 0 00 Image data is 4 bits per pixel and packed 2 pixels per byte 01 Image data is 1 bit per pixel and packed 8 pixels per byte 10 Reserved 11 Reserved Bin Threshold Set...

Page 44: ...st Registers are not returned Registers First 1 Registers are returned before image data 0 Registers are returned after image data Histo Full Array 1 The histogram is taken over the full image array 0 The histogram considers only the center 64x16 pixels Histogram Data Enable 1 The histogram message will be sent when imaging 0 No histogram message is sent when imaging Image Data Disable 1 The image...

Page 45: ...ured at the end of power on reset when RESET_N transitions from low to high When RESET_N is low the GPIO signal outputs are forced off 2 With RESET_N inactive GPIO pins have normal functionality 3 RESET_N is the only reset state that affects GPIO s and GPIO Output Enables 4 GPIO pins are affected by power on reset only Software Master Reset has no effect GPIO3 1 Sets GPIO3 high 0 Sets GPIO3 low GP...

Page 46: ...is held off to allow the histogram message to complete Finger Present Timer When high indicates that finger detect circuitry has determined a finger is on the sensor The result that is shown is a reflection of the delay based finger detect method Scan State 0000 Waiting For Finger 0001 In Finger Settling Delay 0010 In Power Up Delay 0011 Waiting To Start Image Scan 0100 Pre loading Sub array 0 010...

Page 47: ...ct during navigation mode 0 No finger present Up Down Left Right D3 D0 When Navigation mode is selected the state of these bits indicate which direction if a direction is indicated by finger location or movement the sensor believes the finger is indication for cursor navigation Values of 0 in all register bits indicate the finger is static 6 1 1 25 Challenge Word 2 CHWORD2 9Ch Reset Value D7 D6 D5...

Page 48: ... 7 Writing to this register alters bits 13 through 7 of the challenge word READ IO_SEL 1 0 Indicates the selected interface 11 USB 6 1 1 28 Challenge Word 5 CHWORD5 9Fh Reset Value D7 D6 D5 D4 D3 D2 D1 D0 Challenge Word 6 Reserved 0 X X X X X X X Challenge Word 5 Challenge Word 4 Challenge Word 3 Challenge Word 2 Challenge Word 1 Challenge Word 0 WRITE Challenge Word 6 0 Writing to this register a...

Page 49: ...mA 11 7 2 mA The table below shows the recommended minimum bias settings based on the highest frequency and drive level being used assuming a nominal 3 3V power supply Frequency 325 V 65 V 1 3 V 2 6 V 125 KHz 00b 00b 00b 00b 250 KHz 00b 00b 00b 01b 500 KHz 00b 00b 01b 10b 1 MHz 00b 01b 10b 11b 2 MHz 01b 10b 11b 11b Sense Bias Unlock 1 Unlocks the controlling of sense amp bias as a function of meas...

Page 50: ...shold 3 FD Threshold 2 FD Threshold 1 FD Threshold 0 0 0 0 0 0 0 0 0 1 Decrease Rdet 0 Detect resistor is nominally 4K ohm 1 Detect resistor is nominally 1K ohm FD Threshold 3 0 Sets the Timer based finger detect delay threshold Measured delay values above the setting in this register will cause the FINGER PRESENT condition to be true when using delay based finger detect ...

Page 51: ...r read command will produce only 2 bytes the register address header for the register selected in ADh and the register contents for that address 0 Register read produces full register set at selected interface Reset Value D7 D6 D5 D4 D3 D2 D1 D0 Reserved Reserved Reserved Reserved Reserved Reserved Single Reg Enable 0 0 0 1 0 0 0 0 0 ...

Page 52: ...ADDR ADh Reset Value D7 D6 D5 D4 D3 D2 D1 D0 Single Reg ID 6 Single Reg ID 5 Single Reg ID 4 Single Reg ID 3 Single Reg ID 2 Single Reg ID 1 Single Reg ID 0 0 0 0 0 0 0 0 0 0 When reading single register contents is enabled REG ACh this register identifies which register address will be read ...

Page 53: ...0 0 0 0 0 0 0 0 0 FDRV X 9 7 READ ONLY If Register 0x83 D6 0 FCRV X FDRV_DELAY 9 7 If Register 0x83 D6 1 FCRV X FDRV_REFERENCE 9 7 6 1 1 34 FDRV X LO FDRVXLO AFh Reset Value D7 D6 D5 D4 D3 D2 D1 D0 FDRV X 6 FDRV X 5 FDRV X 4 FDRV X 3 FDRV X 2 FDRV X 1 FDRV X 0 0 0 0 0 0 0 0 0 0 FDRV X 6 0 READ ONLY If Register 0x83 D6 0 FCRV X FDRV_DELAY 6 0 If Register 0x83 D6 1 FCRV X FDRV_REFERENCE 6 0 ...

Page 54: ...without USB transactions to the sensor 0 Normal operation Watchdog Timer 2 0 Selects timeout value for watchdog timer Required settings for system use are 2 seconds or above 000 15 ms 001 100ms 010 500ms 011 1 second 100 2 seconds 101 3 seconds 110 4 seconds 111 5 seconds Reset Value D7 D6 D5 D4 D3 D2 D1 D0 Reserved Reserved Watchdog Enable Reserved Watchdog Time 2 Watchdog Time 1 Watchdog Time 0 ...

Page 55: ...able 1 GPO disable 0 0 0 0 0 0 1 1 1 1 GPIO3 Disable 1 GPIO3 output is disabled pin may be used as an input 0 GPIO3 pin is an output GPIO2 Disable 1 GPIO2 output is disabled pin may be used as an input 0 GPIO2 pin is an output GPIO1 Disable 1 GPIO1 output is disabled pin may be used as an input 0 GPIO1 pin is an output GPIO0 Disable 1 GPIO0 output is disabled pin may be used as an input 0 GPIO0 pi...

Page 56: ...OFTIMELOW BBh Reset Value D7 D6 D5 D4 D3 D2 D1 D0 SOF Timestamp 6 SOF Timestamp 5 SOF Timestamp 4 SOF Timestamp 3 SOF Timestamp 2 SOF Timestamp 1 SOF Timestamp 0 0 0 0 0 0 0 0 0 0 SOF Timestamp FreeRun 6 0 READ ONLY This register indicates the lower 7 bits of the start of imaging timestamp When Register 0x82 D0 is set the counter free runs and these bits are updated at the time of the register rea...

Page 57: ...Dh Reset Value D7 D6 D5 D4 D3 D2 D1 D0 EOF Timestamp 6 EOF Timestamp 5 EOF Timestamp 4 EOF Timestamp 3 EOF Timestamp 2 EOF Timestamp 1 EOF Timestamp 0 0 0 0 0 0 0 0 0 0 EOF Timestamp 6 0 READ ONLY This register indicates the lower 7 bits of the end of imaging timestamp This is a free running counter ...

Page 58: ...ble shows the header byte definitions for each message type Header Byte Definition 80h BEh Register headers BFh DDh Reserved DEh Precedes 32 byte histogram message DFh Precedes eight byte authentication value E0h Precedes 500 ppi array data message in gray scale The array message is 192 columns x 16 pixels per column x byte per pixel 1536 bytes In 250 ppi mode the array message is 96 columns x 8 p...

Page 59: ...xel 7 3 0 6 Column 1 pixel 10 3 0 Column 1 pixel 9 3 0 7 Column 1 pixel 12 3 0 Column 1 pixel 11 3 0 8 Column 1 pixel 14 3 0 Column 1 pixel 13 3 0 9 Column 1 pixel 16 3 0 Column 1 pixel 15 3 0 10 Column 2 pixel 2 3 0 Column 1 pixel 1 3 0 1537 Column 192 pixel 16 3 0 Column 192 pixel 15 3 0 Table 7 2 Gray Scale Message Format The 0xE0h header for the row is sent first followed by each column vector...

Page 60: ...up 8 3 0 Table 7 3 4 Bit 250 ppi Gray Scale Message Format The header for the row is sent first followed by each 2 column vector sent as eight bytes The difference between this mode and 500 ppi mode is that four adjacent pixels are summed together and returned as a single 4 bit value The 64 bit pixel data updates the authentication word in the same format as for normal data After all data for the ...

Page 61: ...eader F0h 2 Column 1 pixels 8 1 3 Column 1 pixels 16 9 4 Column 2 pixels 8 1 5 Column 2 pixels 16 9 385 Column 192 pixels 16 9 Table 7 4 Monochrome Packed Message Format The header for the row is sent first followed by each column sent as two bytes The 64 bit value from four columns updates the authentication word in the same manner as for normal data After all data for the selected number of rows...

Page 62: ...eceded by a header byte 0xDE The header is followed by the counts for each of the bins representing possible pixel values Bin 0 the number of pixels whose value is 0 is sent first as two bytes The first byte has the lower seven bits and the second byte has the upper seven bits This is followed by the counts for the remaining bins Byte Data D6 D0 1 Header 0xDE 2 Bin0 6 0 3 Bin0 13 7 4 Bin1 6 0 5 Bi...

Page 63: ...used to validate that the transaction is authentic i e that the image data isn t being provided from some storage device containing a valid fingerprint image Byte Data D6 D0 1 Header 0xDF 2 Authentication Word 7 0 3 Authentication Word 15 8 4 Authentication Word 23 16 5 Authentication Word 31 24 6 Authentication Word 39 32 7 Authentication Word 47 40 8 Authentication Word 55 48 9 Authentication Wo...

Page 64: ...A with std Leaded Balls GF 48 BGA with lead free Balls CC Carrier Options CA Plastic Carrier Trays 240 sensors per tray TR Tape Reel w 3500 sensors per reel DD Drive Ring Options GO Gold NI Nickel EE Options 0A Silicon revision code in 2501A series Contact AuthenTec Sales for current revision code Example AES2501A with Gold ring Lead free solder balls shipped as tape reels AES2501A C GF TR GO0A ...

Page 65: ... Pb 456 Wafer Lot I D from manufacturer 9 Revision History Version Date Person Reason Released 12 29 03 Lee Release Date of Public Specification 1 1 30 March 04 Lee Added power supply ripple spec 1 2 30 May 04 Lee Formatting Fixes 1 3 10 Aug 04 Lee Added part numbering and backside laser mark info 1 0 28 Oct 04 Lee Updates for 2501A A10 Pin change to PLL_FILTER Pin change necessitates new part num...

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