Arcom SC88T, Technical Manual

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Section 2. Circuit Description
The 16MHz oscillator module drives the 80188 CPU (IC12) and optionally the
STEbus system clock. The 8MHz output clock from the CPU is halved by IC11,
to produce the 4MHz clock to drive the SCC (IC13). The SCC is wired to
connector PL3 via RS232 buffer IC18 and IC19.
IC9 is a logic array which detects bus accesses and generates wait states, based
on the address, the state of the on-board chip selects and the CPU status. IC8
latches the top 4 bits of the CPU address bus and IC7 latches the lowest eight
bits. IC11 controls chip-selects for the RAMs (IC15,17) and generates a one bit
output port for use as an attention request on the STEbus.
The EPROMs (IC14 and 16) can be 8, 16, 32 or 64k each and there are 2 jumpers
to set the EPROM size.
Address and data lines on the bus are driven by IC1,2,4 and 5, with IC5 driving
the strobes. Incoming bus signals are buffered by IC3 and 6. Reset can come in
from the bus (via LK5A) to reset the CPU, or it can go to the bus from the on-
board reset circuit, in which case a reset switch can be wired between the pins
of connector PL2.
J90 SC88T
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2192-08819-000-000