The memory blocks of the 80188 cannot be
mapped at any arbitrary location. The
Middle Memory Chip-Selects are all the
same size, and must be mapped at a base
address which is a multiple of the middle
memory block size. Hence this is the only
way of creating a chip select area contiguous
with UCS.
MCS0, MCS1 and MCS3 are not used. To
ensure that they do not interfere with STE
memory space, set UCS and MCS0-3 to
include externally -generated wait states. (So
that accesses to memory in the MCS0 and
MCS1 address ranges wait for the DATACK*
signal from the STEbus.)
Example shown with two 8k RAMs (as
supplied) plus two 32k EPROMs.
J90 SC88T
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Example memory map using two 32k EPROMs. If EPROM 0 is not used, and
MCS0-3 disabled, then STEbus accesses may continue up to the base address of
EPROM1.
Summary of Contents for SC88T
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