PRELIMINARY TECHNICAL DATA
ADM1026
– 5 –
REV. PrL
PRELIMINAR
Y
TECHNICAL
DA
TA
PIN FUNCTION DESCRIPTION
PIN NO.
MNEMONIC
TYPE
DESCRIPTION
1
GPIO9
Digital Input
General purpose I/O pin can be configured as a digital input or output.
2
GPIO8
Digital Input
General purpose I/O pin can be configured as a digital input or output.
3
FAN0/GPIO0
Digital I/O
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
4
FAN1/GPIO1
Digital I/O
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
5
FAN2/GPIO2
Digital I/O
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
6
FAN3/GPIO3
Digital I/O
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
7
3.3V MAIN
Power
Main 3.3V power supply.
8
D G N D
Ground
Ground pin for digital circuits.
9
FAN4/GPIO4
Digital Input
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
10
FAN5/GPIO5
Digital Input
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
11
FAN6/GPIO6
Digital Input
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
12
FAN7/GPIO7
Digital Input
Fan tachometer input, or can be re-configured as a general purpose
digital I/O pin. This pin has an internal 10k
⍀
pullup resistor.
13
S C L
Digital Input
Open-drain Serial Bus Clock. Requires 2.2k
⍀
pullup resistor.
14
S D A
Digital I/O
Serial Bus Data. Open-drain output. Requires 2.2k
⍀
pullup resistor.
15
ADD/
Digital Input
This is a three-state input that controls the two LSBs of the Serial Bus
N T E S T O U T
Address. It also functions as the output for NAND tree testing.
16
C I
Digital Input
An active high input which captures a Chassis Intrusion event in Bit 7
of Status Register 4. This bit will remain set until cleared, so long as
battery voltage is applied to the V
BAT
input, even when the ADM1026
is powered off.
17
INT
Digital Output
Interrupt Request (open drain). The output is enabled when Bit 1 of
the Configuration Register is set to 1. The default state is disabled.
It has an on-chip 100k
⍀
pullup resistor.
18
P W M
Digital Output
Pulse-width modulated output for control of fan speed. Open drain.
19
RESETSTBY
Digital Output
Power-on Reset. 5 mA driver (open drain), active low output with a
200 ms minimum pulse width.
RESETSTBY
is asserted whenever
3.3VSTBY is below the reset threshold. It remains asserted for approx.
200ms after 3.3VSTBY rises above the reset threshold.
20
RESETMAIN
Digital I/O
Power-on Reset. 5 mA driver (open drain), active low output with a
200 ms minimum pulse width.
RESETMAIN
is asserted whenever
3.3V MAIN is below the reset threshold. It remains asserted forapprox.
200ms after 3.3V MAIN rises above the reset threshold. If, however,
3.3V STBY rises with or before 3.3V MAIN, then
RESETMAIN
remains asserted for 200ms after
RESETSTBY
is de-asserted.
Pin 21
also functions as an active low
RESET
input.
21
A G N D
Ground
Ground pin for analog circuits
22
3.3V STBY
Power
Standby 3.3V power supply.
