AMIMON AMN12310 WHDI, Datasheet

Page: 23 / 39

Interfaces
Version 0.5
AMIMON Confidential 23
3.4.3 WHDI Module Configuration
In order to distinguish between boards and by the SW, there is an on board ID that can be read by the STM32F.
WHDI_MODULE_ID (Details)
Tx="0",
Rx="1"
Interrupt Polarity:
"0"=falling, "1"=rising
I2C Address: "00"=0x62,
"01"=0x72, 10"=0x60, 11"=0x70
MODULE_ID
Comments
Amimon Project
Part Number
[7] [6] [5] [4] [3] [2] [1] [0]
AMN11310 Rev. 2.0 1 0 0 0 0 0 0 0
AMN12310 Rev. 2.0 1 0 1 0 0 0 1 0
3.5 Reset and Wake-up Timer
The AMN11100 has one hard
RESET
input pin connected directly to the AMN2110 and to the STM32F uC, as
described in Figure 11. Assertion of the STM32F reset switches the clock of uC to the internal oscillator until the
Albatross does not assert an INIT_DONE interrupt. Assertion of the Albatross reset enables the generation of the
10 MHz clock. After a hard reset, the MAC asserts the SW reset signal which just clears the registers without
resetting the clock generation scheme.
When the INIT_DONE is asserted, it indicates the completion of the Albatross initialization and that the 10 MHz
clock is stable. At that point, the uC switches to the external clock source from the Albatross and enable
communication with the application microcontroller.
clk rst
T
−
ST
rst
T
init
T
Figure 10: Reset Time Diagram