AMIMON AMN12310 WHDI, Datasheet

Page: 20 / 39

Interfaces
Version 0.5
AMIMON Confidential 20
Table 6: MCLK timing.
Symbol Parameter MIN TYP MAX Units
T
MCKCYC
MCK period 244.14
81.38 ns
T
MCKFREQ
MCK frequency
4.096*
12.288** MHz
T
MCKDUTY
MCK duty cycle 40 60 %
T
DCKPDR
Propagation delay after MCK
rising edge
25 ns
T
DCKPDF
Propagation delay after MCK
falling edge 25 ns
T
JITTER-CYC-
CYC
Cycle-to-cycle jitter*** 5 ns
* The minimum frequency is obtained by using the minimum audio sampling frequency of 32 KHz and the
minimum clock rate multiplication of 128.
** The maximum frequency is obtained by using the minimum audio sampling frequency 48 KHz and the
minimum clock rate multiplication of 256.
*** The cycle-to-cycle jitter is based on the system clock of the AMN2210, which is 200 MHz.